Search Results - "Bezuk, Steve"

The electromigration behavior of copper pillars for different current directions and pillar shapes by Hau-Riege, Christine, YouWen Yau, Caffey, Kevin, Kumar, Rajneesh, YangYang Sun, Bao, Andy, Shah, Milind, Zhao, Lily, Bchir, Omar, Syed, Ahmer, Bezuk, Steve

“…A significant asymmetry in electromigration behavior was observed for copper pillars depending on the electron current direction; the electromigration…”
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Chip Package Interaction with fine pitch Cu pillar bump using mass reflow and thermal compression bonding assembly process for 20nm/16nm and beyond by Zhao, Lily, Bao, Andy, Yangyang Sun, Chun-Jen Chen, Tsai, Scott, Lee, Kenny, Xuefeng Zhang, Perry, Dan, Kalleberg, Tor, Han, Michael, Bezuk, Steve, Yeap, Geoffrey

“…This paper summarizes key learnings on 20/16nm CPI (Chip-Package-Interaction) challenges at 100um pitch and below to support ever increasing…”
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Reactions of acetonitrile in a radiofrequency discharge by So, Ying Hung, Bezuk, Steve J, Miller, Larry L

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Reactions of carbonyl sulfide in a radio-frequency plasma by Bezuk, Steve J, Miller, Larry L, Platzner, I

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0.35mm pitch wafer level package board level reliability: Studying effect of ball de-population with varying ball size by Keser, Beth, Alvarado, Rey, Schwarz, Mark, Bezuk, Steve

“…Board level reliability studies have been performed on wafer level packages (WLP) of various die sizes with 0.35mm ball pitch, SAC405 solder alloy, and two…”
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Board level reliability and surface mount assembly of 0.35mm and 0.3mm pitch wafer level packages by Keser, Beth, Alvarado, Rey, Choi, Alan, Schwarz, Mark, Bezuk, Steve

“…Board level reliability studies have been performed on wafer level packages (WLP) on various die sizes with 0.35mm and 0.3mm ball pitches. The 0.35mm pitch…”
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Evaluation of Ag wire reliability on fine pitch wire bonding by Xi, Jiaqing, Mendoza, Norbe, Chen, Kevin, Yang, Thomas, Reyes, Edward, Bezuk, Steve, Lin, Juln, Ke, Shenggin, Chen, Eason

“…The semiconductor assembly industry has migrated from Au wire to a low-cost alternative, Cu wire, and has recently started increasing the use of Ag alloy wire…”
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Challenges and opportunities of chip package interaction with fine pitch Cu pillar for 28nm by Bao, Andy, Zhao, Lily, Yangyang Sun, Han, Michael, Yeap, Geoffrey, Bezuk, Steve, Holmes, Pat, Alcira, Cecille, Xuefeng Zhang, Lee, Kenny

“…As device dimension shrinks less than 65nm, the propagation delay, crosstalk noises, and power dissipation due to RC (Resistance Capacitance) coupling becomes…”
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Quantifying impact of design parameters on Ultra-Low k ILD reliability in fine pitch Cu bump interconnect structures by Bao, Andy, Tong Cui, Syed, Ahmer, Zhao, Lily, Bezuk, Steve

“…Increasing feature integration into mobile processors and high performance require denser IO as well as more power/ground pin count. Specifically DDR speed is…”
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The impact of different under bump metallurgies and redistribution layers on the electromigration of solder balls for wafer-level packaging by Hau-Riege, Christine, Keser, Beth, Alvarado, Rey, Syed, Ahmer, Yau, YouWen, Bezuk, Steve, Caffey, Kevin

“…Electromigration performance has been characterized for lead-free solder balls in wafer-level packaging for different solder metallurgy, under bump metallurgy…”
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Electromigration of solder balls for wafer-level packaging with different under bump metallurgy and redistribution layer thickness by Hau-Riege, Christine, Keser, Beth, You-Wen Yau, Bezuk, Steve

“…Electromigration (EM) has been conducted on lead-free solder balls in wafer-level packages for different redistribution layer (RDL) thicknesses, under bump…”
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Improvement of substrate and package warpage by copper plating process optimization by Bchir, Omar, Jomaa, Houssam, Chin Kwan Kim, Rouhana, Layal, Kuiwon Kang, Shah, Milind, Bezuk, Steve

“…High substrate warpage can lead to unacceptable yield loss during chip attach in assembly, and cause high yield fallout during package mount on the circuit…”
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A study of wafer level package board level reliability by Xu, Steven, Keser, Beth, Hau-Riege, Christine, Bezuk, Steve, You-Wen Yau

“…Board level reliability studies have been performed on wafer level packages (WLP) with various solder ball alloys, underbump metallurgy compositions, and…”
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Study of new alloy composition for solder balls - Identifying material properties as key leading indicators toward improved board level performance by Alvarado, Rey, Keser, Beth, Zhou, Eric, Schwarz, Mark, Bezuk, Steve, Wang, Henry, Kok-Lin Heng

“…The quest for improved board level reliability (BLR) in wafer level packages (WLPs) motivates a characterization of novel alloys, and their impact on BLR…”
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