Search Results - "Benschneider, B"
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1
Clocking design and analysis for a 600-MHz Alpha microprocessor
Published in IEEE journal of solid-state circuits (01-11-1998)“…Design, analysis, and verification of the clock hierarchy on a 600 MHz Alpha microprocessor is presented. The clock hierarchy includes a gridded global clock,…”
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Journal Article -
2
A 1GHz alpha microprocessor
Published in Digest of technical papers - IEEE International Solid-State Circuits Conference (01-01-2000)“…The architecture of a 1 GHz microprocessor with very large scale integration (VLSI) implementation was described. The microprocessor used 1.65 V nominal…”
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Journal Article -
3
Design and migration challenges for an alpha microprocessor in a 0.18 mu m copper process
Published in Digest of technical papers - IEEE International Solid-State Circuits Conference (01-01-2001)“…The aluminum to copper conversion issues encountered in designing an alpha microprocessor using the multilayered copper interconnects were discussed. An alpha…”
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Journal Article -
4
A pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor
Published in IEEE journal of solid-state circuits (01-10-1989)“…A 135K transistor, uniformly pipelined 50-MHz CMOS 64-bit floating-point arithmetic processor chip is described. The execution unit is capable of sustaining…”
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Journal Article -
5
A 300-MHz 64-b quad-issue CMOS RISC microprocessor
Published in IEEE journal of solid-state circuits (01-11-1995)“…This 300 MHz quad-issue custom VLSI implementation of the Alpha architecture delivers 1200 MIPS (peak), 600 MFLOPS (peak), 341 SPECint92, and 512 SPECfp92. The…”
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Journal Article -
6
An overview of the Alpha AXP 21164 microprocessor
Published in 38th Midwest Symposium on Circuits and Systems. Proceedings (1995)“…This paper describes the microarchitecture of the Alpha 21164 microprocessor, a second-generation, custom VLSI, 64-bit implementation of the Alpha…”
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Conference Proceeding -
7
Design and migration challenges for an Alpha microprocessor in a 0.18 /spl mu/m copper process
Published in 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) (2001)“…An Alpha microprocessor design is implemented in a 0.18 /spl mu/m CMOS process, utilizing 7 layers of copper interconnect. Process features include nominal and…”
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Conference Proceeding -
8
System, process, and design implications of a reduced supply voltage microprocessor
Published in 1990 37th IEEE International Conference on Solid-State Circuits (1990)“…The system, process, and design implications of converting a microprocessor chip set originally implemented in a 5-V, 1.5- mu m (drawn) CMOS process to one…”
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Conference Proceeding