Search Results - "Bennour, I."
-
1
New perovskite Ba0.7La0.3Ti0.55Fe0.45O3-δ prepared by citric sol-gel method: From structure to physical properties
Published in Journal of molecular structure (05-10-2020)“…A new material Ba0.7La0.3Ti0.55Fe0.45O3-δ (BLTFO) has been prepared via the citric sol gel method. The correlation between structural, vibrational, and…”
Get full text
Journal Article -
2
Petri nets framework for analyzing the communication behavior of TLM modules
Published in 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (01-05-2012)“…Assembling a SoC using third party blocs is still an error-prone, labor-intensive and time-consuming process, due to a misunderstanding of the their…”
Get full text
Conference Proceeding -
3
A simulation based approach for incorporating virtual components IP cores into multimedia systems design
Published in 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03) (2003)“…Growing requirements on the correct design of high performance multimedia systems in a short time force us to use intellectual property (IP) blocks in many…”
Get full text
Conference Proceeding -
4
A multi-level design flow for incorporating IP cores: case study of 1D wavelet IP integration
Published in 2003 Design, Automation and Test in Europe Conference and Exhibition (2003)“…The design of high performance multimedia systems in a short time force us to use IP blocks in many designs. However, their correct integration in a design…”
Get full text
Conference Proceeding -
5
Modeling of Transaction Level SystemC modules and transactional channels with Petri nets
Published in 2008 2nd International Conference on Signals, Circuits and Systems (01-11-2008)“…Currently, Transaction Level Modeling (TLM) is being used in the industry to solve a variety of practical problems during the design and deployment of…”
Get full text
Conference Proceeding -
6
A scheduling approach for packet-switched on-chip networks
Published in 2011 International Conference on Communications, Computing and Control Applications (CCCA) (01-03-2011)“…Performance constraints imposed on the on-Chip System (SoC) design require efficiency and predictability of inter-core communication part in system. This…”
Get full text
Conference Proceeding -
7
Performance Modeling and Estimation Along an MPSoC Flow
Published in 2008 2nd International Conference on Signals, Circuits and Systems (01-11-2008)“…We present in this paper, a new approach of heterogeneous multiprocessors systems-on-chip architecture (MPSoC) co-design based on performance control. This…”
Get full text
Conference Proceeding -
8
A simulation based approach for incorporating virtual components IP cores into multimedia systems design
Published in 2003 International Conference on Multimedia and Expo. ICME '03. Proceedings (Cat. No.03TH8698) (2003)“…Growing requirements on the correct design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their…”
Get full text
Conference Proceeding -
9
Communication graph and timing configuration for virtual components
Published in ICM 2001 Proceedings. The 13th International Conference on Microelectronics (2001)“…SOC design requires connecting and integrating intellectual property (IP) and virtual components (VC) from various sources. Among factors limiting IP reuse is…”
Get full text
Conference Proceeding -
10
A static method for system performance estimation
Published in Proceedings of the Tenth International Conference on Microelectronics (Cat. No.98EX186) (1998)“…Performance estimation techniques and tools help designers to quickly determine appropriate computer architectures and programmers to optimize implementations…”
Get full text
Conference Proceeding -
11
Optimal design of synchronous circuits using software pipelining techniques
Published in Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273) (1998)“…In this paper, we present a method to optimize clocked circuits by relocating and changing the time of activation of registers to maximize throughput. Our…”
Get full text
Conference Proceeding -
12
System level abstraction models and application to MicroNetwork design
Published in Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004 (2004)“…System models with level of abstractions higher than behavior-level and register-transfer-level are essential to handle the increasing complexity of system on…”
Get full text
Conference Proceeding -
13
Register allocation using circular FIFOs
Published in 1996 IEEE International Symposium on Circuits and Systems (ISCAS) (1996)“…In this paper, we study the memory allocation problem in data path synthesis. We propose a register organization called circular FIFO as an alternative to…”
Get full text
Conference Proceeding