Search Results - "Barwin, J."

A 16-Mb MRAM featuring bootstrapped write drivers by Gogl, D., Arndt, C., Barwin, J.C., Bette, A., DeBrosse, J., Gow, E., Hoenigschmid, H., Lammers, S., Lamorey, M., Yu Lu, Maffitt, T., Maloney, K., Obermaier, W., Sturm, A., Viehmann, H., Willmott, D., Wood, M., Gallagher, W.J., Mueller, G., Sitaram, A.R.

“…A 16-Mb magnetic random access memory (MRAM) is demonstrated in 0.18-/spl mu/m three-Cu-level CMOS with a three-level MRAM process adder. The chip, the highest…”
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An SRAM Design in 65nm and 45nm Technology Nodes Featuring Read and Write-Assist Circuits to Expand Operating Voltage by Pilo, H., Barwin, J., Braceras, G., Browning, C., Burns, S., Gabric, J., Lamphier, S., Miller, M., Roberts, A., Towler, F.

“…This paper describes a 32Mb SRAM that has been designed and fabricated in a 65nm low-power CMOS technology. The design has also been migrated to 45nm bulk and…”
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