Search Results - "Balado, L."

Verifying Functional Specifications by Regression Techniques on Lissajous Test Signatures by Balado, L., Lupon, E., Figueras, J., Roca, M., Isern, E., Picos, R.

“…In this paper, a low-cost method to verify functional specifications of analog VLSI circuits is proposed. The method is based on the analysis of Lissajous…”
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Analog circuit test based on a digital signature by Gomez, A, Sanahuja, R, Balado, L, Figueras, J

“…Production verification of analog circuit specifications is a challenging task requiring expensive test equipment and time consuming procedures. This paper…”
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Impact of a sleep intervention program on anxiety and depression in patients with chronic musculoskeletal pain (CMP) by Romero-Peralta, S., Benito, G. Hernando, Pérez, E. Solano, Coso, C., Martínez, L. Silgado, Masa Jiménez, J.F., Barrio, P. Resano, García, M. Castillo, Ayuso, E. Viejo, Balado, L. Álvarez, Andrés, R. Mediano, Mediano, O.

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Testing Biquad Filters under Parametric Shifts Using X-Y Zoning by Sanahuja, R, Barcons, V, Balado, L, Figueras, J

“…Testing mixed-signal circuits is a difficult task due to defect modeling challenges, observability and controllability restrictions and ATE bandwidth…”
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Defining the heterogeneity of sleep apnea syndrome: a cluster analysis with implications for patient management by Romero-Peralta, S., García-Río, F., Resano Barrio, P., Izquierdo Alonso, J.L., Viejo-Ayuso, M.E., Mediano San Andrés, R., Martínez, L. Silgado, Balado, L. Álvarez, Naval, J. Castelao, Francés, J. Fernández, Mediano, O.

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Analog Switches in Programmable Analog Devices: Quiescent Defective Behaviours by Rodríguez-Montañ, R., Muñoz, D., Balado, L., Figueras, J.

“…Analog Switches (AS) play an essential role in a large number of Mixed-Signal circuits. Depending on the use of AS, designers have optimised their topology to…”
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On High-Quality, Low Energy Built-In Self Test Preparation at RT-Level by Santos, M.B., Teixeira, I.C., Teixeira, J.P., Manich, S., Balado, L., Figueras, J.

“…Issue Title: Special Issue on the Third IEEE Latin-American Test Workshop Test power requirements for complex components are becoming stringent. The purpose of…”
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BIST technique by equally spaced test vector sequences by Manich, S., Garcia, L., Balado, L., Lupon, E., Rius, J., Rodriguez, R., Figueras, J.

“…Built-in self-test (BIST) strategies require the implementation of efficient test pattern generators (TPG) in order to excite and observe the potential faults…”
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On the selection of efficient arithmetic additive test pattern generators [logic test] by Manich, S., Garcia, L., Balado, L., Lupon, E., Rius, J., Rodriguez, R., Figueras, J.

“…Built-in self-test (BIST) strategies require the implementation of efficient test pattern generators (TPG) which allow the excitation and observation of…”
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Digital, memory and mixed-signal test engineering education: five centres of competence in Europe by Flottes, M.-L., Bertrand, Y., Balado, L., Lupon, E., Biasizzo, A., Novak, F., Di Carlo, S., Prinetto, P., Pricopi, N., Wunderlich, H.-J.

“…The launching of the EuNICE-Test project was announced two years ago at the first DELTA Conference. This project is now completed and the present paper…”
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Test engineering education in Europe: the EuNICE-Test project by Bertrand, Y., Flottes, M.-L., Balado, L., Figueras, J., Biasizzo, A., Novak, F., Di Carlo, S., Prinetto, P., Pricopi, N., Wunderlich, H.-J., Van der Heyden, J.-P.

“…The paper deals with a European experience of education in industrial test of ICs and SoCs using remote testing facilities. The project addresses the problem…”
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Academic Network for Microelectronic Test Education by Novak, Franc, Biasizzo, Anton, Bertrand, Yves, Flottes, Marie-Lise, Balado, Luz, Figueras, Joan, Di Carlo, Stefano, Prinetto, Paolo Ernesto, Pricoli, Nicoleta, Wunderlich, Hans-Joachim, van Der Heyden, Jean-Pierre

“…This paper is an overview of the activities performed in the framework of the European IST project EuNICE-Test (European Network for Initial and Continuing…”
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Testing IC accelerometers using Lissajous compositions by Gomez-Pau, A., Balado, L., Figueras, J.

“…Micro Electro Mechanical devices (MEMs) have widened their range of applications in a spectacular way in the last years. Reliability of MEMs devices is one of…”
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CMOS leakage power at cell level by Mendoza, R., Ferre, A., Balado, L., Figueras, J.

“…Leakage power consumption in nanometric CMOS circuits is growing at exponential rate due to the aggressive scaling trends of channel lengths, gate oxide…”
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Lissajous Based Mixed-Signal Testing for N-Observable Signals by Balado, L., Lupon, E., Garcia, L., Rodriguez-Montanes, R., Figueras, J.

“…A methodology for enhanced Lissajous based test (LBT) using n observable signals of the circuit under test (CUT) is proposed. This cost effective approach to…”
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Validation and test of systems on chip: a case study by Balado, L., Lupon, E.

“…Complex integrated systems that include embedded digital microprocessors and analogue parts have validation and test problems that cannot be solved only with…”
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Analog Switches in programmable analog devices: quiescent defective behaviour by Rodriguez-Montanes, R., Munoz, D., Balado, L., Figueras, J.

“…Analog switches (AS) have played an essential role in a large number of mixed signal (M-S) circuits. Depending on the use of the AS, designers have optimised…”
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Quiescent current estimation for current testing by Balado, L., Figueras, J., Rubio, J.A., Champac, V., Rodriguez, R., Segura, J.

“…Logic voltage testing has some limitations dealing with defects that turn digital into analog values. For these parametric faults, current testing is being…”
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Castex in Argentine neuro-psychiatry by Balado, L E

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El trofismo óseo en las alienadas by CASTEX, M R, ESTEVEZ BALADO, L, GALZERANO, D A

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