Search Results - "Bafleur, M."

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  1. 1

    Comparative study of sensitive volume and triggering criteria of SEB in 600 V planar and trench IGBTs by ZERARKA, M, AUSTIN, P, BAFLEUR, M

    Published in Microelectronics and reliability (01-09-2011)
    “…IGBT power components are more and more used in atmospheric and space applications. Thus, it is essential to study the influence of the natural radiation…”
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    Conference Proceeding Journal Article
  2. 2

    MOS-IGBT power devices for high-temperature operation in smart power SOI technology by Arbess, H., Bafleur, M.

    Published in Microelectronics and reliability (01-09-2011)
    “…We propose a new MOS-IGBT device with improved characteristics for high-temperature operation. It is achieved by inserting in the same LDMOS device P+…”
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    Journal Article Conference Proceeding
  3. 3

    Reliability of ESD protection devices designed in a 3D technology by Courivaud, B., Nolhier, N., Ferru, G., Bafleur, M., Caignet, F.

    Published in Microelectronics and reliability (01-09-2014)
    “…A 3D technology is used to design ESD protection devices. These planar bidirectional components, based on back-to-back diodes, are dedicated to first stage,…”
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    Journal Article Conference Proceeding
  4. 4

    Building-up of system level ESD modeling: Impact of a decoupling capacitance on ESD propagation by Monnereau, N., Caignet, F., Trémouilles, D., Nolhier, N., Bafleur, M.

    Published in Microelectronics and reliability (01-02-2013)
    “…Résumé We present a methodology for precise measurements and simulations of ESD system level stress applied to a simple printed circuit board. The impact of an…”
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    Journal Article
  5. 5

    On-chip measurement to analyze failure mechanisms of ICs under system level ESD stress by Caigneť, F., Nolhier, N., Bafleur, M., Wang, A., Mauran, N.

    Published in Microelectronics and reliability (01-09-2013)
    “…•System Level ESD.•On-chip measurements.•IC design. Electro Static Discharge (ESD) is one of the major causes of electronic system failures. Reliability of ICs…”
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    Journal Article Conference Proceeding
  6. 6

    Electrostatic discharge failure analysis of capacitive RF MEMS switches by Ruan, J., Nolhier, N., Bafleur, M., Bary, L., Coccetti, F., Lisec, T., Plana, R.

    Published in Microelectronics and reliability (01-09-2007)
    “…This paper reports on the investigation of failure mechanisms of aluminum nitride (AlN)-based capacitive RF MEMS switches. Electrostatic discharge (ESD)…”
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    Journal Article Conference Proceeding
  7. 7

    SEB Characterization of Commercial Power MOSFETs With Backside Laser and Heavy Ions of Different Ranges by Luu, A., Miller, F., Poirot, P., Gaillard, R., Buard, N., Carriere, T., Austin, P., Bafleur, M., Sarrabayrouse, G.

    Published in IEEE transactions on nuclear science (01-08-2008)
    “…This paper presents a validation of the methodology based upon backside laser irradiations to characterize the sensitivity of power devices towards…”
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    Journal Article
  8. 8

    ESD failure signature in capacitive RF MEMS switches by Ruan, J., Papaioannou, G.J., Nolhier, N., Mauran, N., Bafleur, M., Coccetti, F., Plana, R.

    Published in Microelectronics and reliability (01-08-2008)
    “…RF MEMS are commonly known as electrostatic devices using high electric field for their actuation. They can be exposed to transient voltages in any…”
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    Journal Article Conference Proceeding
  9. 9

    Evaluation of the ESD performance of local protections based on SCR or bi-SCR with dynamic or static trigger circuit in 32 nm by Bourgeat, J., Entringer, C., Galy, P., Bafleur, M., Marin-Cudraz, D.

    Published in Microelectronics and reliability (01-09-2010)
    “…The reliability of electronic devices against electrostatic discharge stresses is still a severe challenge, particularly for deep sub-micron technologies such…”
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    Journal Article Conference Proceeding
  10. 10

    Analytical description of the injection ratio of self-biased bipolar transistors under the very high injection conditions of ESD events by Gendron, A., Renaud, P., Bafleur, M., Nolhier, N.

    Published in Solid-state electronics (01-05-2008)
    “…This paper proposes a 1D-analytical description of the injection ratio of a self-biased bipolar transistor under very high current injection conditions…”
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    Journal Article
  11. 11

    Failure mechanisms of discrete protection device subjected to repetitive electrostatic discharges (ESD) by Diatta, M., Bouyssou, E., Trémouilles, D., Martinez, P., Roqueta, F., Ory, O., Bafleur, M.

    Published in Microelectronics and reliability (01-09-2009)
    “…High reliability electronic devices need to sustain thousands of electrostatic discharge (ESD) stresses during their lifetime. In this paper, it is…”
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    Journal Article Conference Proceeding
  12. 12

    Transient voltage overshoots of high voltage ESD protections based on bipolar transistors in smart power technology by Delmas, A, Gendron, A, Bafleur, M, Nolhier, N, Gill, C

    “…Transient voltage overshoots of a high voltage (20 V) ESD clamp based on bipolar transistors in a smart power technology are studied using different TLP pulse…”
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    Conference Proceeding
  13. 13

    Application of various optical techniques for ESD defect localization by Essely, F., Darracq, F., Pouget, V., Remmach, M., Beaudoin, F., Guitard, N., Bafleur, M., Perdu, P., Touboul, A., Lewis, D.

    Published in Microelectronics and reliability (01-09-2006)
    “…Various optical defect localization techniques are applied on the same integrated circuits (IC). These circuits were previously stressed by Electro Static…”
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    Journal Article Conference Proceeding
  14. 14

    Latch-up ring design guidelines to improve electrostatic discharge (ESD) protection scheme efficiency by Tremouilles, D., Bafleur, M., Bertrand, G., Nolhier, N., Mauran, N., Lescouzeres, L.

    Published in IEEE journal of solid-state circuits (01-10-2004)
    “…In this paper, we show how latch-up guard rings, surrounding electrostatic discharges (ESD) protection devices, can reduce the overall performance of the ESD…”
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    Journal Article Conference Proceeding
  15. 15

    Analysis and compact modeling of a vertical grounded-base n-p-n bipolar transistor used as ESD protection in a smart power technology by Bertrand, G., Delage, C., Bafleur, M., Nolhier, N., Dorkel, J.-M., Nguyen, Q., Mauran, N., Tremouilles, D., Perdu, P.

    Published in IEEE journal of solid-state circuits (01-09-2001)
    “…A thorough analysis of the physical mechanisms involved in a vertical grounded-base n-p-n bipolar transistor (VGBNPN) under electrostatic discharge (ESD)…”
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    Journal Article
  16. 16

    Long-term reliability of silicon bipolar transistors subjected to low constraints by Crosson, A., Escotte, L., Bafleur, M., Talbourdet, D., Crétinon, L., Perdu, P., Perez, G.

    Published in Microelectronics and reliability (01-09-2007)
    “…We present in this study the effect of electrical ageing on silicon (Si) NPN bipolar transistors. This study is based on a sample of half-hundred components,…”
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    Journal Article Conference Proceeding
  17. 17

    Identification of the physical signatures of CDM induced latent defects into a DC–DC converter using low frequency noise measurements by Gao, Y., Guitard, N., Salamero, C., Bafleur, M., Bary, L., Escotte, L., Gueulle, P., Lescouzeres, L.

    Published in Microelectronics and reliability (01-09-2007)
    “…In this paper, it is demonstrated that low frequency noise measurements are an efficient tool for the detection of latent defects induced by CDM stress in a…”
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    Journal Article Conference Proceeding
  18. 18

    Backside Localization of Current Leakage Faults Using Thermal Laser Stimulation by Desplats, R., Beaudoin, F., Perdu, P., Poirier, P., Tremouilles, D., Bafleur, M., Lewis, D.

    Published in Microelectronics and reliability (01-09-2001)
    “…Thermal laser stimulation (OBIRCH, TIVA) is shown to be a valuable method for localizing current leakage from the front or backside of the silicon die. Its…”
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    Journal Article
  19. 19
  20. 20

    Different Failure signatures of multiple TLP and HBM Stresses in an ESD robust protection structure by Guitard, N., Essely, F., Trémouilles, D., Bafleur, M., Nolhier, N., Perdu, P., Touboul, A., Pouget, V., Lewis, D.

    Published in Microelectronics and reliability (01-09-2005)
    “…The failure signatures of a grounded-base NPN bipolar ESD protection under multiple TLP and HBM stresses are analyzed. For this particular device having a…”
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    Journal Article Conference Proceeding