Search Results - "BERMOND, C"

RF characterization of the substrate coupling noise between TSV and active devices in 3D integrated circuits by Bermond, C., Brocard, M., Lacrevaz, T., Farcy, A., Le Maître, P., Leduc, P., Ben Jamaa, H., Chéramy, S., Sillon, N., Fléchet, B.

“…[Display omitted] •Innovative and realistic 4-port test structures for high wide frequency range characterizations.•Extraction of noise coupling between TSVs…”
Get full text

Wideband frequency and in situ characterization of ultra thin ZrO2 and HfO2 films for integrated MIM capacitors by BERTAUD, T, BERMOND, C, LACREVAZ, T, VALLEE, C, MORAND, Y, FLECHET, B, FARCY, A, GROS-JEAN, M, BLONKOWSKI, S

“…Complementary characterisation protocols are needed to analyse high-k insulator behaviour from DC to microwave frequencies. The extraction of Plasma Enhanced…”
Get full text

Weighted improper colouring by Araujo, J., Bermond, J-C., Giroire, F., Havet, F., Mazauric, D., Modrzejewski, R.

“…In this paper, we study a colouring problem motivated by a practical frequency assignment problem and, up to our best knowledge, new. In wireless networks, a…”
Get full text

RF characterization and modelling of high density Through Silicon Vias for 3D chip stacking by Cadix, L., Bermond, C., Fuchs, C., Farcy, A., Leduc, P., DiCioccio, L., Assous, M., Rousseau, M., Lorut, F., Chapelon, L.L., Flechet, B., Sillon, N., Ancey, P.

“…3D integration including Through Silicon Vias is more and more considered as the solution to overcome conventional 2D IC issues. In this way, TSV analytical…”
Get full text

Wideband frequency and in situ characterization of aluminum nitride (AlN) in a metal/insulator/metal (MIM) configuration by Bertaud, T., Defay, E., Bermond, C., Lacrevaz, T., Abergel, J., Salem, B., Capraro, S., Flechet, B.

“…This paper deals with the electrical wideband frequency and in situ characterization of aluminum nitride (AlN) material. This material is interesting for bulk…”
Get full text

Performance predictions of interconnect networks for advanced technology nodes by Gallitre, M., Farcy, A., Blampey, B., Bermond, C., Fléchet, B., Ancey, P.

“…New materials are required for upcoming technologies to maintain good performance levels and increase circuit lifetime. Predictive simulations are thus…”
Get full text

Quality factor and frequency bandwidth of 2D self-inductors in 3D integration stacks by Roullard, J., Capraro, S., Eid, E., Cadix, L., Bermond, C., Lacrevaz, T., Farcy, A., Flechet, B.

“…Effects due to 3D level stack on high frequency (HF) properties of 2D self-inductors integrated in the back end of line (BEOL) are investigated. Different…”
Get full text

"Performance predictions of interconnect networks for advanced technology nodes" by Gallitre, M., Farcy, A., Blampey, B., Bermond, C., Fléchet, B., Ancey, P.

Get full text

Characterization and modeling of RF substrate coupling effects in 3D integrated circuit stacking by Eid, E., Lacrevaz, T., Bermond, C., Capraro, S., Roullard, J., Fléchet, B., Cadix, L., Farcy, A., Ancey, P., Calmon, F., Valorge, O., Leduc, P.

“…This work addresses parasitic substrate coupling effects in 3D integrated circuits due to Through Silicon Vias (TSV). Electrical characterizations have been…”
Get full text

Establishing the scientific base for energy efficiency in emerging pressing and drying technologies by Bermond, C.

“…A mathematical model for the simulation of a press section of a paper machine has been developed. This model includes thermal aspects of hot pressing and…”
Get full text

Microwave characterization of porous SiOCH permittivity after integration dedicated to the 32 nm node by Blampey, B., Gallitre, M., Farcy, A., Lacrevaz, T., De Rivaz, S., Bermond, C., Fléchet, B., Jousseaume, V., Zenasni, A., Ancey, P.

“…New porous ULK materials are now required for maintaining a constant RC factor as back-end dimensions shrink for each new technology node. Porous SiOCH ULK HF…”
Get full text

Impact of process parameters on circuit performance for the 32 nm technology node by Farcy, A., Gallitre, M., Arnal, V., Sellier, M., Guibe, L., Blampey, B., Bermond, C., Fléchet, B., Torres, J.

“…As IC dimensions scale down to the 32 nm technology node, interconnect is more than ever the most limiting factor affecting overall circuit performance. The…”
Get full text

Distributed Loop Computer-Networks: A Survey by Bermond, J.C., Comellas, F., Hsu, D.F.

“…Distributed loop computer networks are extensions of the ring networks and are widely used in the design and implementation of local area networks and parallel…”
Get full text

The power of small coalitions in graphs by Bermond, J-C, Bond, J, Peleg, D, Perennes, S

“…This paper considers the question of the influence of a coalition of vertices, seeking to gain control (or majority) in local neighborhoods in a general graph…”
Get full text

Impact of porous SiOCH on propagation performance measured for narrow interconnects of the 45 nm node by Gallitre, M., Blampey, B., Fléchet, B., Farcy, A., Arnal, V., Bermond, C., Lacrevaz, T., Torres, J.

“…With the dimensions scaling down at each new technology node, introduction of porous dielectric materials is required to reduce the interconnect capacitance…”
Get full text

Wide band frequency and in situ characterisation of high permittivity insulators (High- K) for H.F. integrated passives by Lacrevaz, T., Fléchet, B., Farcy, A., Torres, J., Gros-Jean, M., Bermond, C., Vo, T.T., Cueto, O., Blampey, B., Angénieux, G., Piquet, J., de Crécy, F.

“…High permittivity insulators (High- K) are progressively introduced in high-speed integrated passives and devices in order to optimize circuits performances…”
Get full text

Impact of porous SiOCH on propagation performance measured for narrow interconnects of the 45nm node by Gallitre, M., Blampey, B., Fléchet, B., Farcy, A., Arnal, V., Bermond, C., Lacrevaz, T., Torres, J.

“…With the dimensions scaling down at each new technology node, introduction of porous dielectric materials is required to reduce the interconnect capacitance…”
Get full text

Impact of process parameters on circuit performance for the 32nm technology node by Farcy, A., Gallitre, M., Arnal, V., Sellier, M., Guibe, L., Blampey, B., Bermond, C., Fléchet, B., Torres, J.

“…As IC dimensions scale down to the 32nm technology node, interconnect is more than ever the most limiting factor affecting overall circuit performance. The…”
Get full text

Impact of dummies on interconnects network HF propagation performances for the 65 nm node by Blampey, B., Fléchet, B., Farcy, A., Gallitre, M., Bermond, C., Cueto, O., Torres, J., Angénieux, G.

“…Based on electromagnetic approach, electrical models of coupled interconnects surrounded by dummies are extracted, and a simulation procedure in time domain is…”
Get full text

Fault tolerant on-board networks with priorities by Bermond, J.-C., Havet, F., Tóth, C.D.

“…We consider on‐board networks in satellites interconnecting entering signals (inputs) to amplifiers (outputs). The connections are made via expensive switches,…”
Get full text