Search Results - "Avra, R."
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1
Structured design-for-debug-the SuperSPARC II methodology and implementation
Published in Proceedings of 1995 IEEE International Test Conference (ITC) (1995)“…This paper describes a structured design-for-debug methodology that provides observability throughout an entire chip. It makes use of existing…”
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Conference Proceeding -
2
A three-million-transistor microprocessor
Published in 1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers (1992)“…Describes a RISC (reduced-instruction-set computer) BiCMOS superscalar microprocessor containing 3.1 M transistors which executes up to three instructions per…”
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Conference Proceeding