Search Results - "Aritome, S"

Improvement of Interpoly Dielectric Characteristics by Plasma Nitridation and Oxidation for Future nand Flash Memory by Ching Yuan Ho, Chenhsin Lien, Sakamoto, Y., Ru Jye Yang, Fijita, H., Liu, C.H., Lin, Y.M., Pittikoun, S., Aritome, S.

“…In this letter, plasma nitridation and oxidation on interpoly dielectric (IPD; SiO 2 -SiN-SiO 2 ) for cell programming speed and reliabilities are…”
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Stress-induced leakage current of tunnel oxide derived from flash memory read-disturb characteristics by Satoh, S., Hemink, G., Hatakeyama, K., Aritome, S.

“…This paper describes the characteristics of the stress-induced leakage current of tunnel oxide derived from flash memory read-disturb characteristics. The…”
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Reliability issues of flash memory cells by Aritome, S., Shirota, R., Hemink, G., Endoh, T., Masuoka, F.

“…Reliability issues for flash electrically erasable programmable read-only memories are reviewed. The reliability of both the source-erase type (ETOX) flash…”
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A compact on-chip ECC for low cost flash memories by Tanzawa, T., Tanaka, T., Takeuchi, K., Shirota, R., Aritome, S., Watanabe, H., Hemink, G., Shimizu, K., Sato, S., Takeuchi, Y., Ohuchi, K.

“…A compact on-chip error correcting circuit (ECC) for low cost flash memories has been developed. The total increase in chip area is 2%, including all cells,…”
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A side-wall transfer-transistor cell (SWATT cell) for highly reliable multi-level NAND EEPROMs by Aritome, S., Takeuchi, Y., Sato, S., Watanabe, I., Shimizu, K., Hemink, G., Shirota, R.

“…A multi-level NAND Flash memory cell, using a new Side-WAll Transfer-Transistor (SWATT) structure, has been developed for a high performance and low bit cost…”
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Advanced flash memory technology and trends for file storage application by Aritome, S.

“…This paper describes a high density flash memory technology suitable for file storage application. Requirements for file storage memory are low cost,…”
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Novel Negative Vt Shift Phenomenon of Program-Inhibit Cell in \hboxX\hboxX\hbox\hbox Self-Aligned STI nand Flash Memory by Aritome, S., Soonok Seo, Hyung-Seok Kim, Sung-Kye Park, Seok-Kiu Lee, Sungjoo Hong

“…A novel program-inhibit phenomenon of "negative" cell Vt shift has been investigated for the first time in 2 X - 3 X -nm self-aligned shallow trench isolation…”
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Advanced DC-SF Cell Technology for 3-D NAND Flash by Aritome, S., Yoohyun Noh, Hyunseung Yoo, Eun Seok Choi, Han Soo Joo, Youngsoo Ahn, Byeongil Han, Sungjae Chung, Keonsoo Shim, Keunwoo Lee, Sanghyon Kwak, Sungchul Shin, Iksoo Choi, Sanghyuk Nam, Gyuseog Cho, Dongsun Sheen, Seungho Pyi, Jongmoo Choi, Sungkye Park, Jinwoong Kim, Seokkiu Lee, Sungjoo Hong, Sungwook Park, Kikkawa, T.

“…Advanced dual control gate with surrounding floating gate (DC-SF) cell process and operation schemes are successfully developed for 3-D nand flash memories. To…”
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Scaling of tunnel oxide thickness for flash EEPROMs realizing stress-induced leakage current reduction by Watanabe, H, Aritome, S, Hemink, G J, Maruyama, T, Shirota, R

“…Through the use of a lower impurity concentration in the gate poly-Si and lowering the post-annealing temperature, a highly reliable tunnel oxide…”
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Low-temperature nitridation of fluorinated silicon dioxide films in ammonia gas by ARITOME, S, MORITA, M, TANAKA, T, HIROSE, M

“…A new technique of growing nitrided oxide at low temperatures has been developed. Fluorine-enhanced thermal oxidation of silicon in O2+NF3 at temperatures…”
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BiCMOS circuit technology for high-speed DRAMs by Watanabe, S., Sakui, K., Fuse, T., Hara, T., Aritome, S., Hieda, K.

“…A BiCMOS circuit technology featured by a novel bit-line sense amplifier has been developed. The bit-line sense amplifier is composed of a BiCMOS differential…”
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An experimental 4-Mbit CMOS EEPROM with a NAND-structured cell by Momodomi, M., Itoh, Y., Shirota, R., Iwata, Y., Nakayama, R., Kirisawa, R., Tanaka, T., Aritome, S., Endoh, T., Ohuchi, K., Masuoka, F.

“…A 5-V-only high-density (512 K*8 bit) electrically erasable and programmable read-only memory (EEPROM) has been designed and fabricated by using a…”
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Low-temperature SiO2 growth using fluorine-enhanced thermal oxidation by MORITA, M, ARITOME, S, TSUKUDE, M, MURAKAWA, T, HIROSE, M

“…A new low-temperature oxidation technique of silicon to obtain high quality Si-SiO2 interface and bulk SiO2 layer is presented. A few tens-nanometer-thick…”
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Fluorine-enhanced photo-oxidation of silicon under ArF excimer laser irradiation in an O2 + NF3 gas mixture by MORITA, M, ARITOME, S, TANAKA, T, HIROSE, M

“…We have studied fluorine-enhanced oxidation of silicon in an O2+NF3 gas mixture under ArF excimer laser (193 nm) irradiation. An oxide layer of more than 60 Å…”
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A high-density NAND EEPROM with block-page programming for microcomputer applications by Iwata, Y., Momodomi, M., Tanaka, T., Oodaira, H., Itoh, Y., Nakayama, R., Kirisawa, R., Aritome, S., Endoh, T., Shirota, R., Ohuchi, K., Masuoka, F.

“…A high-density, 5-V-only, 4-Mb CMOS EEPROM with a NAND-structured cell using Fowler-Nordheim tunneling for programming is discussed. The block-page mode is…”
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A novel Multi - Nitridation ONO interpoly dielectric (MN-ONO) for highly reliable and high performance NAND Flash memory by Liu, C. H., Lin, Y. M., Sakamoto, Y., Yang, R. J., Yin, D. Y., Chiang, P. J., Wei, H. C., Ho, C. Y., Chen, S. H., Hwang, H. P., Hung, C. H., Pittikoun, S., Aritome, S.

“…Multi-Nitridation ONO has been demonstrated for the first time. Significant improvement are obtained in NAND Flash performance and reliability. (1) 1V program…”
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Improvement of Interpoly Dielectric Characteristics by Plasma Nitridation and Oxidation for Future @@inand@ Flash Memory by Ho, Ching Yuan, Lien, Chenhsin, Sakamoto, Y, Yang, Ru Jye, Fijita, H, Liu, C H, Lin, Y M, Pittikoun, S, Aritome, S

“…In this letter, plasma nitridation and oxidation on interpoly dielectric (IPD; SiO@@d2@-SiN-SiO@@d2@ ) for cell programming speed and reliabilities are…”
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Highly reliable 26nm 64Gb MLC E2NAND (Embedded-ECC & Enhanced-efficiency) flash memory with MSP (Memory Signal Processing) controller by Hyunyoung Shim, Seaung-Suk Lee, Byungkook Kim, Namjae Lee, Doyoung Kim, Hankyum Kim, Byungkeun Ahn, Youngho Hwang, Hoseok Lee, Jumsoo Kim, Youngbok Lee, Heeyoul Lee, Juyeab Lee, Seungho Chang, Joongseob Yang, Sungkye Park, Aritome, S., Seokkiu Lee, Kun-Ok Ahn, Gihyun Bae, Yeseok Yang

“…A highly reliable 26nm 64GB MLC E2NAND (E2: Embedded-ECC & Enhanced-efficiency) flash memory has been successfully developed. To overcome scaling challenges,…”
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A novel surface-oxidized barrier-SiN cell technology to improve endurance and read-disturb characteristics for gigabit NAND flash memories by Goda, A., Moriyama, W., Hazama, H., Iizuka, H., Shimizu, K., Aritome, S., Shirota, R.

“…This paper describes a novel surface-oxidized barrier-SiN cell technology to effect a tenfold improvement in endurance and read disturb characteristics. In…”
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A New Metal Control Gate Last process (MCGL process) for high performance DC-SF (Dual Control gate with Surrounding Floating gate) 3D NAND flash memory by Yoohyun Noh, Youngsoo Ahn, Hyunseung Yoo, Byeongil Han, Sungjae Chung, Keonsoo Shim, Keunwoo Lee, Sanghyon Kwak, Sungchul Shin, Iksoo Choi, Sanghyuk Nam, Gyuseog Cho, Dongsun Sheen, Seungho Pyi, Jongmoo Choi, Sungkye Park, Jinwoong Kim, Seokkiu Lee, Aritome, S., Sungjoo Hong, Sungwook Park

“…A new Metal Control Gate Last process (MCGL process) has been successfully developed for the DC-SF (Dual Control gate with Surrounding Floating gate cell)[1]…”
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