Search Results - "Arisumi, O."

Suppression of the floating-body effect in partially-depleted SOI MOSFETs with SiGe source structure and its mechanism by Nishiyama, A., Arisumi, O., Yoshimi, M.

“…SiGe layers were formed in source regions of partially-depleted 0.25-/spl mu/m SOI MOSFETs by Ge implantation, and the floating-body effect was investigated…”
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Characteristics of an Oxygen Barrier Based on Bi-layered Ir by Moon, B. K., Arisumi, O., Bruchhaus, R., Tsutsumi, K., Itokawa, H., Hornik, K., Tsuchiya, T., Hilliger, A., Lian, J., Pinnow, C. U., Ozaki, T., Kunishima, I., Nagel, N., Yamakawa, K., Beitel, G.

“…For high-density ferroelectric random access memory devices (FeRAMs) with capacitor over plug (COP) structure, oxygen diffusion barriers based on bi-layered Ir…”
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Oxygen Diffusion Barriers for High-Density FeRAMs by Moon, B. K., Pinnow, C. U., Imai, K., Arisumi, O., Itokawa, H., Hornik, K., Tsutsumi, K., Hilliger, A., Kunishima, I., Nagel, N., Yamakawa, K., Beitel, G.

“…For high-density ferroelectric random access memories (FeRAMs) with capacitor over plug (COP) structure, oxygen diffusion barriers have been investigated. This…”
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Suppression of the floating-body effect in SOI MOSFET's by the bandgap engineering method using a Si/sub 1-x/Ge/sub x/ source structure by Yoshimi, M., Terauchi, M., Nishiyama, A., Arisumi, O., Murakoshi, A., Matsuzawa, K., Shigyo, N., Takeno, S., Tomita, M., Suzuki, K., Ushiku, Y., Tango, H.

“…The bandgap engineering method using a SiGe source structure is presented as a means to suppress the floating-body effect in SOI MOSFET's. Experiments using Ge…”
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Mechanism of the suppression of the floating-body effect for SOI MOSFETs with SiGe source structure by Nishiyama, A., Arisumi, O., Yoshimi, M.

“…SiGe layers were formed in source regions of partially depleted 0.25 /spl mu/m SOI nMOSFETs with the Ge implantation technique and the floating-body effect was…”
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FERROELECTRIC PROPERTIES OF Pb(Zr, Ti)O3 CAPACITOR WITH THIN SrRuO3 FILMS WITHIN BOTH ELECTRODES by Morimoto, T, Hidaka, O, Yamakawa, K, Arisumi, O, Kanaya, H, Iwamoto, T

“…Ferroelectric properties of a Pb(Zi, Ti)O3 (PZT) capacitor with thin SrRuO3 (SRO) films within both electrodes were investigated in detail. Thin SRO films of…”
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Novel Pb(Ti, Zr)O 3 (PZT) Crystallization Technique Using Flash Lamp for Ferroelectric RAM (FeRAM) Embedded LSIs and One Transistor Type FeRAM Devices by Yamakawa, Koji, Imai, Keitaro, Arisumi, Osamu, Arikado, Tsunetoshi, Yoshioka, Masaki, Owada, Tatsushi, Okumura, Katsuya

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LEAD CONTENT CONTROL IN (Pb, La)(Zr, Ti)O3 FILMS USING Ar/O2 SEQUENTIAL RAPID THERMAL PROCESS by Arisumi, O, Nakamura, S, Moon, B-K, Yamakawa, K, Imai, K

“…A new method of controlling the Pb profile in (Pb, La)(Zr, Ti)O3 (PLZT) capacitor films with top and bottom SrRuO3 (SRO) electrodes has been developed using an…”
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Lead Content Control in (Pb, La)(Zr, Ti)O 3 Films Using Ar/O 2 Sequential Rapid Thermal Process by Arisumi, Osamu, Nakamura, Shin-ichi, Moon, Bum-Ki, Yamakawa, Koji, Imai, Keitaro

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NOVEL Pb(Ti, Zr)O3(PZT) CRYSTALLIZATION TECHNIQUE USING FLASH LAMP FOR FERROELECTRIC RAM (FERAM) EMBEDDED LSIs AND ONE TRANSISTOR TYPE FERAM DEVICES by Yamakawa, K, Imai, K, Arisumi, O, Arikado, T, Yoshioka, M, Owada, T

“…A novel method of ferroelectric capacitor formation for Ferroelectric random access memory (FeRAM) embedded LSIs and one-transistor-type FeRAMs has been…”
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Suppression of the floating-body effect in SOI MOSFET' s by thebandgap engineering method using a Si(1-x)Ge(x) sourcestructure by Yoshimi, M, Terauchi, M, Nishiyama, A, Arisumi, O, Murakoshi, A, Matsuzawa, K, Shigyo, N, Takeno, S, Tomita, M, Suzuki, K, Ushiku, Y, Tango, H

“…The bandgap engineering method using a SiGe source structure is presented as a means to suppress the floating-body effect in SOI MOSFET's. Experiments using Ge…”
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Development of stable PZT sputtering process using ex-situ crystallization and PZT/Pt interface control technique by Yamakawa, K., Arisumi, O., Okuwada, K., Tsutsumi, K., Katata, T.

“…Precise control of Pb content in sputter-deposited amorphous PZT films was achieved by optimization of substrate temperature; substrate and shield potential,…”
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Analysis of Si-Ge source structure in 0.15 μm SOI MOSFETs using two-dimensional device simulation by ARISUMI, O, MATSUZAWA, K, SHIGYO, N, TERAUCHI, M, NISHIYAMA, A, YOSHIMI, M

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Formation of SiGe source/drain using Ge implantation for floating-body effect resistant SOI MOSFETs by NISHIYAMA, A, ARISUMI, O, TERAUCHI, M, TAKENO, S, SUZUKI, K, TAKAKUWA, C, YOSHIMI, M

“…SiGe was formed by Ge implantation into silicon on insulator (SOI) substrates with the dosage range from 0.5 to 3×10 16  cm -2 and subsequent annealing in N 2…”
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Bandgap engineering technology for suppressing the substrate-floating-effect in 0.15 /spl mu/m SOI-MOSFETs by Yoshimi, M., Nishiyama, A., Terauchi, M., Arisumi, O., Murakoshi, A., Ushiku, Y., Takeno, S., Suzuki, K.

“…The substrate floating effect is the most fundamental problem in SOI-MOSFETs. Conventional countermeasures, such as body-contact, LDD structure are accompanied…”
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