Search Results - "Agrawal, Bhuwan K."
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Timing driven placement using complete path delays
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 27th ACM/IEEE conference on Design automation; 24-27 June 1990 (03-01-1991)“…The Timing Drive Placement (TDP) system balances wirability and timing constraints so that the final released design meets timing criteria. This is achieved by…”
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Conference Proceeding
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2
On design and performance of VLSI based parallel multiplier
Published in 1983 IEEE 6th Symposium on Computer Arithmetic (ARITH) (01-06-1983)“…This paper introduces the VLSI design and layout of a (log 2 n) time n-bit binary parallel multiplier for two unsigned operands. Proposed design consists of…”
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Conference Proceeding