Search Results - "Agaiby, R."

Impact of strained-Si thickness and Ge out-diffusion on gate oxide quality for strained-Si surface channel n-MOSFETs by Dalapati, G.K., Chattopadhyay, S., Kwa, K.S.K., Olsen, S.H., Tsang, Y.L., Agaiby, R., O'Neill, A.G., Dobrosz, P., Bull, S.J.

“…Surface channel strained-silicon MOSFETs on relaxed Si/sub 1-x/Ge/sub x/ virtual substrates (VSs) have been established as an attractive avenue for extending…”
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Strained Si/SiGe MOS technology: Improving gate dielectric integrity by Olsen, S.H., Yan, L., Agaiby, R., Escobedo-Cousin, E., O’Neill, A.G., Hellström, P.-E., Östling, M., Lyutovich, K., Kasper, E., Claeys, C., Parker, E.H.C.

“…Strained Si is recognised as a necessary technology booster for the nanoelectronics regime. This work shows that high levels of stress attainable from globally…”
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Reduced self-heating by strained silicon substrate engineering by O’Neill, A., Agaiby, R., Olsen, S., Yang, Y., Hellstrom, P.-E., Ostling, M., Oehme, M., Lyutovich, K., Kasper, E., Eneman, G., Verheyen, P., Loo, R., Claeys, C., Fiegna, C., Sangiorgi, E.

“…Substrate engineering innovations such as SOI and the use of Si/SiGe virtual substrates become necessary in order to maintain performance leverage of…”
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Control of Self-Heating in Thin Virtual Substrate Strained Si MOSFETs by Olsen, S.H., Escobedo-Cousin, E., Varzgar, J.B., Agaiby, R., Seger, J., Dobrosz, P., Chattopadhyay, S., Bull, S.J., O'Neill, A.G., Hellstrom, P.-E., Edholm, J., Ostling, M., Lyutovich, K.L., Oehme, M., Kasper, E.

“…This paper presents the first results and analysis of strained Si n-channel MOSFETs fabricated on thin SiGe virtual substrates. Significant improvements in…”
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Influence of Frequency Dependent Time to Breakdown on High-K/Metal Gate Reliability by Knebel, S., Kupke, S., Schroeder, U., Slesazeck, S., Mikolajick, T., Agaiby, R., Trentzsch, M.

“…Time-dependent dielectric breakdown and stress-induced leakage current (SILC) behavior of a 28-nm hafnium-based high-k/metal gate n-type MOS transistors are…”
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Dynamic off-state TDDB of ultra short channel HKMG nFETS and its implications on CMOS logic reliability by Kupke, S., Knebel, S., Rahman, S., Slesazeck, S., Mikolajick, T., Agaiby, R., Trentzsch, M.

“…The impact of DC off-state and AC gate + off-state stress on the time dependent dielectric breakdown (TDDB) of ultra-short channel high-k/metal gate (HKMG)…”
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First Insight Into the Lifetime Acceleration Model of High- k \hbox/\hbox/\hbox Stacks for Advanced DRAM Technology Nodes by Agaiby, R., Hofmann, P., Dayu Zhou, Kerber, M., Heitmann, J., Schroeder, U., Erben, E., Oberbeck, L.

“…Long-term reliability results over six orders of magnitude in time are presented showing that the voltage acceleration model for ZrO 2 /SiO 2 /ZrO 2 exhibits…”
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First Insight Into the Lifetime Acceleration Model of High-[Formula Omitted] [Formula Omitted] Stacks for Advanced DRAM Technology Nodes by Agaiby, R, Hofmann, P, Zhou, Dayu, Kerber, M, Heitmann, J, Schroeder, U, Erben, E, Oberbeck, L

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First Insight Into the Lifetime Acceleration Model of High- k hbox ZrO 2 / hbox SiO 2 / hbox ZrO 2 Stacks for Advanced DRAM Technology Nodes by Agaiby, R, Hofmann, P, Dayu Zhou, Dayu Zhou, Kerber, M, Heitmann, J, Schroeder, U, Erben, E, Oberbeck, L

“…Long-term reliability results over six orders of magnitude in time are presented showing that the voltage acceleration model for ZrO sub(2)/SiO sub(2)/ZrO…”
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Insight Into the Aggravated Lifetime Reliability in Advanced MOSFETs With Strained-Si Channels on SiGe Strain-Relaxed Buffers Due to Self-Heating by Agaiby, Rimoon, O'Neill, Anthony G., Olsen, Sarah H., Eneman, Geert, Verheyen, Peter, Loo, Roger, Claeys, Cor

“…This brief compares the quality of ultrathin SiON dielectrics of nMOSFETs grown on strained-Si layers with both thin and thick SiGe strain-relaxed buffers…”
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Quantifying Self-Heating Effects in Strained Si MOSFETs with Scaling by Agaiby, R., O'Neill, A., Olsen, S., Eneman, G., Verheyen, P., Loo, R., Claeys, C.

“…This paper presents the first demonstration and quantification of the reduced self-heating effects in deep submicron n-MOSFETs on thin strain relaxed buffers…”
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6F2 buried wordline DRAM cell for 40nm and beyond by Schloesser, T., Jakubowski, F., v. Kluge, J., Graham, A., Slesazeck, S., Popp, M., Baars, P., Muemmler, K., Moll, P., Wilson, K., Buerke, A., Koehler, D., Radecker, J., Erben, E., Zimmermann, U., Vorrath, T., Fischer, B., Aichmayr, G., Agaiby, R., Pamler, W., Schuster, T., Bergner, W., Mueller, W.

“…We present a 46 nm 6F 2 buried word-line (bWL) DRAM technology, enabling the smallest cell size of 0.013 mum2 published to date. The TiN/ W buried word-line is…”
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Strained silicon technology by Kasper, Erich, Lyutovich, Klara, Ostling, Mikael, Hellstrom, Per-Erik, Bull, S, Dobrosz, P, Chattopadhyay, S, Agaiby, R., Varzgar, J. B., Escobedo-Cousin, E, Olsen, S H, O'Neill, A. G.

“…Following a brief review of strained silicon technology options, this paper presents results and analysis of strained Si n-channel MOSFETs fabricated on thin…”
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