Search Results - "Ademaj, Astrit"

Self-configuration of IEEE 802.1 TSN networks by Gutierrez, Marina, Ademaj, Astrit, Steiner, Wilfried, Dobrin, Radu, Punnekkat, Sasikumar

“…Configuration processes of real-time networks are costly both in terms of time and engineering effort and require the system to be shutdown during the…”
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The time-triggered Ethernet (TTE) design by Kopetz, H., Ademaj, A., Grillinger, P., Steinhammer, K.

“…This paper presents the rational for and an outline of the design of a time-triggered (TT) Ethernet that unifies real-time and non-real-time traffic into a…”
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Application-Level Diagnostic and Membership Protocols for Generic Time-Triggered Systems by Serafini, M, Bokor, Péter, Suri, N, Vinter, J, Ademaj, A, Brandstätter, Wolfgang, Tagliabò, Fulvio, Koch, J

“…We present online tunable diagnostic and membership protocols for generic time-triggered (TT) systems to detect crashes, send/receive omission faults, and…”
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Distributed IMA: Use cases for embedded platforms by Jakovljevic, Mirko, Ademaj, Astrit

“…Distributed IMA, as described in RTCA DO-297, has been used in different forms since 1980s in avionics and modular aircraft control architectures which deploy…”
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A Time-Triggered Ethernet (TTE) Switch by Steinhammer, K., Grillinger, P., Ademaj, A., Kopetz, H.

“…This paper presents the design of a time-triggered Ethernet (TTE) switch, which is one of the core units of the time-triggered Ethernet system. Time-triggered…”
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2nd generation IMA: Extended virtualization capabilities for optimized architectures by Jakovljevic, Mirko, Ademaj, Astrit

“…2nd generation of integrated modular architectures (IMA) should be more generic, reconfigurable and scalable to be adopted for different aircraft platforms…”
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Combination of clock-state and clock-rate correction in fault-tolerant distributed systems by Kopetz, Hermann, Ademaj, Astrit, Hanzlik, Alexander

“…This paper proposes the integration of internal and external clock synchronization by a combination of a fault-tolerant distributed algorithm for clock state…”
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Segmentation of standard ethernet messages in the time-triggered ethernet by Mikolasek, V., Ademaj, A., Racek, S.

“…TT Ethernet is a communication architecture which allows the integration of the standard Ethernet traffic and real-time Ethernet traffic in the same network…”
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Embedded cloud computing for critical systems by Jakovljevic, Mirko, Insaurralde, Carlos C., Ademaj, Astrit

“…Future generic integrated embedded platforms shall host applications with time-, safety- and mission-critical functions deployed on a set of virtualized…”
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A Tunable Add-On Diagnostic Protocol for Time-Triggered Systems by Serafini, M., Suri, N., Vinter, J., Ademaj, A., Brandstatter, W., Tagliabo, F., Koch, J.

“…We present a tunable diagnostic protocol for generic time-triggered (TT) systems to detect crash and send/receive omission faults. Compared to existing…”
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Ethernet protocol services for critical embedded systems applications by Jakovljevic, M, Ademaj, A

“…Ethernet is an evolving standard, not a static one. It's a family of frame-based networking technologies and communication services offering different…”
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Time-Triggered Ethernet and IEEE 1588 Clock Synchronization by Ademaj, A., Kopetz, H.

“…The time-triggered Ethernet unifies real-time and non-real-time traffic into a single communication architecture. We have built a prototype implementation of…”
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Integration of Predictable and Flexible In-Vehicle Communication using Time-Triggered Ethernet by Ademaj, Astrit, Kopetz, Hermann, Grillinger, Petr, Steinhammer, Klaus, Prammer, Manfred

“…This paper presents a novel communication architecture denoted as time-triggered (TT) Ethernet that integrates real-time and non-real-time traffic into a…”
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Software implementation of a time-triggered ethernet controller by Grillinger, P., Ademaj, A., Steinhammer, K., Kopetz, H.

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Evaluation of fault handling of the time-triggered architecture with bus and star topology by Ademaj, A., Sivencrona, H., Bauer, G., Torin, J.

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Integration of internal and external clock synchronization by the combination of clock-state and clock-rate correction in fault-tolerant distributed systems by Kopetz, H., Ademaj, A., Hanzlikm A

“…This paper proposes the integration of internal and external clock synchronization by a combination of a fault-tolerant distributed algorithm for clock state…”
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