Search Results - "Acharyya, D."

Alcohol sensing performance of ZnO hexagonal nanotubes at low temperatures: A qualitative understanding by Acharyya, D., Bhattacharyya, P.

“…[Display omitted] ZnO hexagonal nanotube array was synthesized on fluorine doped tin-oxide (FTO) coated glass substrate (thickness: 1.1mm, surface Resistivity:…”
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A journey towards reliability improvement of TiO2 based Resistive Random Access Memory: A review by Acharyya, D., Hazra, A., Bhattacharyya, P.

“…A Resistive Random Access Memory (RRAM), where the memory performance principally originated from ‘resistive’ change rather than ‘capacitive’ one (the case…”
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Noise Analysis-Resonant Frequency-Based Combined Approach for Concomitant Detection of Unknown Vapor Type and Concentration by Acharyya, D., Roy Chaudhuri, R., Bhattacharyya, P.

“…This paper introduces a novel measurement procedure for the concomitant detection of type and concentration of unknown target species employing a combination…”
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Rigorous Extraction of Process Variations for 65-nm CMOS Design by Wei Zhao, Liu, F., Agarwal, K., Acharyya, D., Nassif, S.R., Nowka, K.J., Yu Cao

“…Statistical circuit analysis and optimization are critical for robust nanoscale CMOS design. To accurately perform such analysis, primary process variation…”
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An efficient BTX sensor based on ZnO nanoflowers grown by CBD method by Acharyya, D., Bhattacharyya, P.

“…[Display omitted] •CBD grown ZnO nanoflower based benzene toluene and xylene sensor is developed.•Structural characterizations authenticated existence of…”
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Design Considerations for PD/SOI SRAM: Impact of Gate Leakage and Threshold Voltage Variation by Kanj, R., Joshi, R.V., Sivagnaname, J., Kuang, J.B., Acharyya, D., Nguyen, T.Y., Nassif, S.

“…We present a critical study of the impact of gate tunneling currents on the yield of 65-nm partially depleted/silicon-on-insulator (PD/SOI) SRAM designs. A new…”
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Hardware results demonstrating defect detection using power supply signal measurements by Acharyya, D., Plusquellic, J.

“…The power supply transient signal (I/sub DDT/) method that we propose for defect detection analyzes regional signal variations introduced by defects at a set…”
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Impedance profile of a commercial power grid and test system by Acharyya, D., Plusquellic, J.

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Hierarchical MnO2 Nanoflowers Based Efficient Room Temperature Alcohol Sensor by Acharyya, D., Ghosal, S., Roychaudhuri, R., Bhattacharyya, P.

“…In the present work, hierarchical 3-D MnO 2 nanoflowers (consisting of 2D nanosheets) were synthesized employing hydrothermal technique and subsequently…”
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Electrochemically grown nono-structured TiO2 based low power resistive random access memory by Hazra, A., Acharyya, D., Bhattacharyya, P.

“…Nano TiO 2 thin film was grown on high purity Ti foil by electrochemical anodization techniques using 1 (M) as H 2 SO 4 electrolyte. Film was annealed at 600 0…”
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On-chip jitter and oscilloscope circuits using an asynchronous sample clock by Schaub, J.D., Gebara, F.H., Nguyen, T.Y., Vo, I., Pena, J., Acharyya, D.J.

“…We demonstrate digital circuits for measuring the jitter histograms of gigahertz clock and data signals. The circuits do not require calibration, and an…”
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A physical unclonable function defined using power distribution system equivalent resistance variations by Helinski, Ryan, Acharyya, Dhruva, Plusquellic, Jim

“…For hardware security applications, the availability of secret keys is a critical component for secure activation, IC authentication and for other important…”
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Detecting Trojans Through Leakage Current Analysis Using Multiple Supply Pad s by Aarestad, J, Acharyya, D, Rad, R, Plusquellic, J

“…Hardware Trojans have emerged as a new threat to the security and trust of computing systems. Hardware Trojans are deliberate and malicious modifications to…”
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Calibrating power supply signal measurements for process and probe card variations by Acharyya, D., Plusquellic, J.

“…The power supply transient signal (I/sub DDT/) methods that we propose for defect detection and localization analyze regional signal variations introduced by…”
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Quiescent-Signal Analysis: A Multiple Supply Pad IDDQ Method by Plusquellic, J., Acharyya, D., Singh, A., Tehranipoor, M., Patel, C.

“…Increasing leakage current makes single-threshold IDDQ testing ineffective for differentiating defective and detect-free chips. Quiescent-signal analysis is a…”
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Leveraging existing power control circuits and power delivery architecture for variability measurement by Acharyya, D, Agarwal, K, Plusquellic, J

“…Embedded test structures are increasingly being used to measure and analyze performance and power variations in product chips to better understand the impact…”
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Error-tolerant bit generation techniques for use with a hardware-embedded path delay PUF by Aarestad, J., Plusquellic, J., Acharyya, D.

“…Cryptographic and authentication applications in application-specific integrated circuits (ASICs) and FPGAs, as well as codes for the activation of on-chip…”
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Architecture and implementation of a truly parallel ATE capable of measuring pico ampere level current by Acharyya, D., Miyao, K., Ting, D., Lam, D., Smith, R., Fitzpatrick, P., Buras, B., Williamson, J.

“…With advancing technology nodes, the feature sizes of transistors are scaled down aggressively and the effects of process variations on semiconductor device…”
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Rigorous extraction of process variations for 65nm CMOS design by Wei Zhao, Yu Cao, Liu, F., Agarwal, K., Acharyya, D., Nassif, S., Nowka, K.

“…Statistical circuit analysis and optimization are critical for robust nanoscale design. To accurately perform such analysis, primary process variation sources…”
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Characterizing within-die and die-to-die delay variations introduced by process variations and SOI history effect by Aarestad, Jim, Lamech, Charles, Plusquellic, Jim, Acharyya, Dhruva, Agarwal, Kanak

“…Variations in delay caused by within-die and die-to-die process variations and SOI history effect increase timing margins and reduce performance. In order to…”
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