Vertical GaN Trench‐MOSFETs Fabricated on Ammonothermally Grown Bulk GaN Substrates

Vertical GaN Trench‐MOSFETs Fabricated on Ammonothermally Grown Bulk GaN Substrates

Herein, the fabrication and characterization of vertical GaN trench‐MOSFETs on ammonothermally grown bulk GaN substrates have been reported. A number of technological processes have been developed, including, among others, low‐resistance ohmic contacts to Ga‐face n‐GaN epitaxial layers, N‐face backs...

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Bibliographic Details
Published in:Physica status solidi. A, Applications and materials science Vol. 221; no. 21
Main Authors: Kamiński, Maciej, Taube, Andrzej, Tarenko, Jaroslaw, Sadowski, Oskar, Brzozowski, Ernest, Wierzbicka, Justyna, Zadura, Magdalena, Ekielski, Marek, Kosiel, Kamil, Jankowska‐Śliwińska, Joanna, Abendroth, Kamil, Szerling, Anna, Prystawko, Paweł, Boćkowski, Michał, Grzegory, Izabella
Format: Journal Article
Language:English
Published: Weinheim Wiley Subscription Services, Inc 01-11-2024
Subjects:
Atomic layer epitaxy
Contact resistance
devices on bulk GaN
Epitaxial growth
Epitaxial layers
Gallium nitrides
GaN processing
GaN transistors
MOSFETs
power devices
Substrates
Surface preparation
Threshold voltage
Topology
trench formation
trench‐MOSFET
vertical GaN
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Summary:Herein, the fabrication and characterization of vertical GaN trench‐MOSFETs on ammonothermally grown bulk GaN substrates have been reported. A number of technological processes have been developed, including, among others, low‐resistance ohmic contacts to Ga‐face n‐GaN epitaxial layers, N‐face backside ohmic contact, vertical sidewall trench etching processes, surface preparation, and atomic layer deposition of gate dielectric layers and integrated with fabrication process flow of vertical power devices. The fabricated test structures are characterized by an output drain current of 288 ± 74 mA mm−1, threshold voltage of about 10 V, and field‐effect channel mobility 13.1 ± 5.0 cm2 (Vs)−1 at 10 V drain‐source voltage and up to 65 cm2 (Vs)−1 at 0.1 V drain‐source voltage. In addition, first, experiments toward high current multicell transistor fabrication are carried out. Multicell test devices with hexagonal topology with a total gate width of 11.1 mm and output current over 1 A are successfully fabricated and characterized. Herein, the optimization fabrication technology of fully vertical GaN trench‐MOSFET is presented.Low‐resistance ohmic contacts to Ga‐face and backside N‐face, vertical sidewall trench etching processes, surface preparation, and atomic layer deposition of gate dielectric layers technology were developed and integrated with fabrication process flow. Transistors with over 1 A on‐state current are designed, fabricated, and characterized.
ISSN:1862-6300
1862-6319
DOI:10.1002/pssa.202400077