Search Results - "Abadir, Magdy"

Modeling the kinetics of pyrolysis of date seeds using artificial neural networks by Felobes, R. A., Abadir, Magdy

“…Ground date seeds were subjected to thermal analysis in a stream of Nitrogen at four different heating rates (5, 10, 15 and 20oC.min-1 ) and their TG – DTG…”
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Preparation of insulating firebricks using date seeds by Abadir, Magdy, Eldesoki, Hosam Moselhy, Ibrahim, Osama Abdel Bary, Sakka, Nada Ragab El

“…Background The use of combustible vegetable waste in the manufacture of refractory insulating firebricks has a double advantage: making use of vegetable waste…”
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Editorial TVLSI Positioning-Continuing and Accelerating an Upward Trajectory by Alioto, Massimo

“…I. VLSI Systems: A Glance Into The Last Decades Since their inception in 1970s, VLSI systems have enabled several new technological capabilities and made them…”
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Coverage metrics for verification of concurrent SystemC designs using mutation testing by Sen, Alper, Abadir, Magdy S

“…Design verification has grown to dominate the cost of electronic system design; however, designs continue to be released with latent bugs. A verification test…”
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Guest Editorial: Test and Verification Challenges for Future Microprocessors and SoC Designs by Ray, Sandip, Bhadra, Jay, Abadir, Magdy S., Wang, Li-C

“…With increasing sophistication of VLSI technology, process, and architecture, microprocessors and SoC systems continue to increase in complexity. This has…”
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Classification rule learning using subgroup discovery of cross-domain attributes responsible for design-silicon mismatch by Callegari, Nicholas, Drmanac, Dragoljub, Li-C Wang, Abadir, Magdy S

“…Due to the magnitude and complexity of design and manufacturing processes, it is unrealistic to expect that models and simulations can predict all aspects of…”
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A pattern mining framework for inter-wafer abnormality analysis by Sumikawa, Nik, Wang, Li-C, Abadir, Magdy S.

“…This work presents three pattern mining methodologies for inter-wafer abnormality analysis. Given a large population of wafers, the first methodology…”
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Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG by Veneris, Andreas, Chang, Robert, Abadir, Magdy S, Seyedi, Sep

“…Fault equivalence is an essential concept in digital design with significance in fault diagnosis, diagnostic test generation, testability analysis and logic…”
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An experiment of burn-in time reduction based on parametric test analysis by Sumikawa, N., Wang, Li-C., Abadir, M. S.

“…Burn-in is a common test approach to screen out unreliable parts. The cost of burn-in can be significant due to long burn-in periods and expensive equipment…”
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An Overview of the International Verification and Security Workshop (IVSW) by Abadir, Magdy, Aftabjahani, Sohrab

“…International Verification and Security Workshop intends to bring industry practitioners and researchers from the fields of security, verification, validation,…”
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An Overview of the International Microprocessor/ SoC Test, Security and Validation (MTV)Workshop by Abadir, Magdy, Aftabjahani, Sohrab

“…International Microprocessor/SoC Test, Security and Validation (MTV) Workshop intends to bring researchers and practitioners from the fields of verification,…”
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Design-silicon timing correlation: a data mining perspective by Wang, Li-C., Bastani, Pouria, Abadir, Magdy S.

“…In the post-silicon stage, timing information can be extracted from two sources: (1) on-chip monitors and (2) delay testing. In the past, delay test data has…”
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Forward prediction based on wafer sort data - A case study by Sumikawa, N., Drmanac, D. G., Wang, Li-C, Winemberg, L., Abadir, M. S.

“…This paper studies the potential of using wafer probe tests to predict the outcome of future tests. The study is carried out using test data based on an SoC…”
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Delay Defect Diagnosis Based Upon Statistical Timing Models " The First Step by Krstic, Angela, Wang, Li-C., Cheng, Kwang-Ting, Liou, Jing-Jia, Abadir, Magdy S.

“…This paper defines a new diagnosis problem for diagnosing delay defects based upon statistical timing models. We illustrate the differences between the delay…”
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Oscillation Ring Delay Test for High Performance Microprocessors by Wu, Wen Ching, Lee, Chung Len, Wu, Ming Shae, Chen, Jwu E, Abadir, Magdy S

“…This paper proposes a new test scheme, oscillation ring test, and its associated test circuit organization for delay fault testing for high performance…”
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On path-based learning and its applications in delay test and diagnosis by Wang, Li-C., Mak, T. M., Cheng, Kwang-Ting, Abadir, Magdy S.

“…This paper describes the implementation of a novel path-based learning methodology that can be applied for two purposes: (1) In a pre-silicon simulation…”
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MTV 2019 Acknowledgments

“…Presents the introductory welcome message from the conference proceedings. May include the conference officers' congratulations to all involved with the…”
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On Efficiently Producing Quality Tests for Custom Circuits in PowerPC(TM) Microprocessors by Wang, Li-c, Abadir, Magdy S

“…Custom circuits, in contrast to those synthesized by automatic tools, are manually designed blocks of which the performance is critical to the full chip…”
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Keynote address tribute to Professor Mel Breuer: Contributions to CAD and Test by Gupta, Sandeep, Abramovici, Miron, Abadir, Magdy, Narayanan, Sridhar

“…This keynote is a tribute to the late Prof. Mel Breuer, entitled Contributions to CAD and Test. It is organized by Sandeep Gupta. A panel of three prominent…”
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Design rewiring using ATPG by Veneris, A., Abadir, M.S., Amiri, M.

“…Technology dependent logic optimization is usually carried through a sequence of design rewiring operations. In Veneris et al (Proc. Asian-South-Pacific Design…”
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