Search Results - "2nd 1998 IEMT/IMC Symposium (IEEE Cat. No.98EX225)"

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  1. 1

    Anisotropic conductive adhesive films for flip-chip interconnection onto organic substrates by Nagai, A., Takemura, K., Isaka, K., Watanabe, O., Kojima, K., Matsuda, K., Watanabe, I.

    “…We have developed new anisotropic conductive adhesive films (ACFs) for flip-chip interconnection to organic substrates such as printed wiring boards (PWBs). In…”
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    Conference Proceeding
  2. 2

    A roadmap to low cost flip chip and CSP using electroless Ni/Au by Oppert, T., Zakel, E., Teutsch, T.

    “…Flip chip (FC) technology is gaining an increased level of importance for a variety of applications based on flip chip on board or flip chip in package. The…”
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    Conference Proceeding
  3. 3

    High density printed circuit board using B/sup 2/it/sup TM/ technology by Goto, K., Oguma, T., Fukuoka, Y.

    “…The authors have developed the B/sup 2/it printed circuit board. The technology was reported initially in a paper at the IMC meeting in April 1996. Since that…”
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  4. 4

    Future waferlevel CSP packaging by Simon, J.

    “…The requirements for wafer-level CSP technology concerning reliability and cost are discussed. A simple cost calculation based on cost per I/O for single chip…”
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  5. 5

    Effects on etching rates of copper in ferric chloride solutions by Jian, C., Jusheng, M., Gangqiang, W., Xiangyun, T.

    “…The influences of several factors on the etching rates of Cu in FeCl/sub 3/ etchant are studied with a spray etching apparatus in this paper. The Cu etching…”
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  6. 6

    Micro/chip scale packages and the semiconductor industry road map by Bauer, C.E.

    “…Micro/chip scale packages are the hot topic in the IC packaging industry at present, but important questions regarding the fit between advances in IC…”
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  7. 7

    Electrical characterization of a 500 MHz frequency EBGA package by Hamano, T., Ikemoto, Y., Okada, A., Asada, K., Abe, M., Kubota, Y.

    “…We developed a 420-ball enhanced BGA (EBGA) package that can accommodate a 500 MHz ASIC with 15 W power consumption. This package uses a low voltage…”
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  8. 8

    Wetting balance evaluation by SP tension method for Pb free solder paste by Ogata, S., Kanai, M., Takei, T.

    “…Recent studies have provided Pb-free solder and soldering technology for use in electronic assemblies for interconnections in order to avoid water pollution…”
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  9. 9

    Thermal dynamics and BGA ball reflow by Wathne, S.R., Wathne, K.S.

    “…Reflow technology has undergone some major changes in recent times. This is largely due to the requirements in the industry to improve process control. Three…”
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  10. 10

    Low-cost direct chip attach: Comparison of SMD compatible FC soldering with anisotropically conductive adhesive FC bonding by Behner, U., Czaya, C.-P., Haug, R., Hauschild, F.-D., Jiang, H., Kaloudis, M., Kotthaus, S., Kuschel, S., Schuetz, R., Schultze, F., Treutler, C.P.O., Vogel, W.

    “…Small modules based on laminate substrates are often used as a functional subunit in electronic applications. Most of them are made by chip and wire techniques…”
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  11. 11

    Fabrication of a parallel inter-board optical interconnection module using transferred multichip bonding by Ohki, A., Usui, M., Sato, N., Matsuura, N., Katsura, K., Ando, Y.

    “…ParaBIT (parallel inter-board optical interconnection technology) is a promising candidate for large-capacity board-to-board interconnection. In ParaBIT module…”
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  12. 12

    An optical coupling technique for parallel optical interconnection modules using polymeric optical waveguide films by Usui, M., Hikita, M., Yoshimura, R., Matsuura, N., Sato, N., Ohki, A., Kagawa, T., Tateno, K., Katsura, K., Ando, Y.

    “…ParaBIT (parallel inter-board optical interconnection technology) is promising for high-throughput interconnections in advanced switching and computer systems…”
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  13. 13

    Direct electroless nickel plating on copper circuits using DMAB as a second reducing agent by Watanabe, H., Honma, H.

    “…Generally, palladium catalyst treatment is applied to initiate the electroless Ni-P plating on the copper patterns because copper does not have a catalytic…”
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  14. 14

    Chip scale package (CSP) solder joint reliability and modeling by Amagai, M.

    “…A viscoplastic constitutive model was used to analyze the thermally induced plastic and creep deformation and low cycle fatigue behavior of the solder joints…”
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  15. 15

    Application of the thermal network method to the transient thermal analysis of multichip modules by Ishizuka, M., Fukuoka, Y.

    “…In recent years, there has been a growing demand to have smaller and lighter electronic circuits which have greater complexity, multifunctionality and…”
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    Conference Proceeding
  16. 16

    Fabrication of low cost microwave circuits and structures using an advanced thick film technology by Barnwell, P., Wood, J.

    “…The explosive growth in applications for microwave circuits and systems is demanding new approaches to circuit technology to satisfy system demands. With…”
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    Conference Proceeding
  17. 17

    A new composite substrate with high thermal conductivity for power modules by Hirano, K., Nakatani, S., Handa, H., Takehara, H.

    “…Recently, it has become more important to take the thermal dispersion of circuit boards into account. We have developed a new composite substrate with high…”
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    Conference Proceeding
  18. 18

    The application of flip chip bonding technology using anisotropic conductive film to the mobile communications terminals by Torii, A., Takizawa, M., Sawano, M.

    “…In the field of mobile communications systems, the terminals have been downsized and given higher functions very rapidly. High-density surface mount technology…”
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  19. 19

    'Hibridas' photoimageable thick film process and materials for microwave and sensor component applications by Muckett, S., Minalgene, J.

    “…The 'Hibridas' photoimageable thick film process was originally developed by the Microelectronics department of the Research Institute for Radiomeasurement…”
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  20. 20

    Advanced substrate and packaging technology by Ishida, T.

    “…Key future semiconductor packaging technology lies in bare-chip packaging technology and high-density circuit board technology. In bare-chip packaging…”
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    Conference Proceeding