Search Results - "2023 Forum on Specification & Design Languages (FDL)"

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  1. 1

    Bifröst: Creating Hardware With Building Blocks by Pope, Jeremy, Seger, Carl-Johan H.

    “…Domain-specific hardware design has become increasingly attractive as single-thread performance improvement has drastically slowed down. At the same time, it…”
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    Conference Proceeding
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  3. 3

    Formal Methods-Based Optimization of Dataflow Models with Translation to Synchronous Models by Werner, Marcel Christian, Schneider, Klaus

    “…Graphical dataflow models are widely used for industrial control system implementation and are accepted by users with different backgrounds due to their…”
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    Conference Proceeding
  4. 4

    Instruction-Level Modeling and Evaluation of a Cache-Less Grid of Processing Cells by Govindasamy, Vivek, Domer, Rainer

    “…While processor speeds continue to show performance increases, memory access speeds remain significantly slower. One solution is to develop novel computer…”
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    Conference Proceeding
  5. 5

    VIR2EM: VIrtualization and Remotization for Resilient and Efficient Manufacturing: Project-Dissemination Paper by Beghi, Alessandro, Dall'Ora, Nicola, Dalle Pezze, Davide, Fummi, Franco, Masiero, Chiara, Spellini, Stefano, Susto, Gian Antonio, Tosoni, Francesco

    “…In this paper, we present the project "VIR2EM: VIrtualization and Remotization for Resilient and Efficient Manufacturing" by providing details on its research…”
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    Conference Proceeding
  6. 6

    PLiNIO: A User-Friendly Library of Gradient-Based Methods for Complexity-Aware DNN Optimization by Pagliari, Daniele Jahier, Risso, Matteo, Motetti, Beatrice Alessandra, Burrello, Alessio

    “…Accurate yet efficient Deep Neural Networks (DNNs) are in high demand, especially for applications that require their execution on constrained edge devices…”
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    Conference Proceeding
  7. 7

    Hybrid PTX Analysis for GPU accelerated CNN inferencing aiding Computer Architecture Design by Metz, Christopher A., Plump, Christina, Berger, Bernhard J., Drechsler, Rolf

    “…General-Purpose Computation on Graphics Processing Units (GPGPUs) are becoming crucial in accelerating computing capacity. Due to the massive parallelism…”
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    Conference Proceeding
  8. 8

    Identification of ISA-Level Mutation-Classes for Qualification of RISC-V Formal Verification by Funck, Milan, Ahmadi-Pour, Sallar, Herdt, Vladimir, Drechsler, Rolf

    “…RISC-V has generated a lot of interest in academia and industry alike due to the open source, modular, and royalty-free design of the Instruction Set…”
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    Conference Proceeding
  9. 9

    Enhancing Compiler-Driven HDL Design with Automatic Waveform Analysis by Skarman, Frans, Klemmer, Lucas, Gustafsson, Oscar, Grobe, Daniel

    “…The time-to-market of a new product is one of its most crucial factors for success, therefore, reducing this time is of utter importance. However, this…”
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    Conference Proceeding
  10. 10

    A Flexible Graph Language for a Model-Based Semi-Automatic CGRA Compilation Flow by Boseler, Felix, Walter, Jorg

    “…Extensive compiler support is a key-necessity for the general acceptance and usability of the promising Coarse Grained Reconfigurable Array (CGRA) accelerator…”
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    Conference Proceeding
  11. 11

    Secure Programming Platform for Edge-Based IoT: Wild-and-Crazy-Idea Paper by Kim, Hokeun

    “…The edge computing-based Internet of Things (IoT) offers benefits in terms of efficiency, low latency, security, and privacy. However, programming models and…”
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    Conference Proceeding
  12. 12

    Satellite Payload Design for Optimized Thermal Management Using a Distributed Processor System by Plattner, Markus, Fassi, Chedi, Kreiner, Florian, Frank, Jintin, Radecker, Philipp, Zimmermann, Markus

    “…Processor Layout Utilization for Thermal Optimization (PLUTO) is a research project that started in 2022 and is co-funded by the Bavarian Ministry of Economic…”
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    Conference Proceeding
  13. 13

    Virtual Prototype Driven Application Specific Hardware Optimization by Zielasko, Jan, Drechsler, Rolf

    “…Most hardware in the area of IoT and embedded systems only ever runs a single application. To reduce the cost and increase performance the hardware can be…”
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    Conference Proceeding
  14. 14

    Minimally Invasive Generation of RISC-V Instruction Set Simulators from Formal ISA Models by Tempel, Soren, Brandt, Tobias, Luth, Christoph, Drechsler, Rolf

    “…The development process for new embedded systems relies increasingly on simulation, e.g. to develop hardware and software components in parallel using virtual…”
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    Conference Proceeding