Search Results - "2021 34th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)"

A 237 ppm/°C L-Band Active Inductance Based Voltage Controlled Oscillator in SOI 0.18 µm by Martins, J. R. O. R., Alves, Francisco, Ferreira, Pietro M.

“…Multi-frequency receivers have become a standard for Global Navigation Satellite Systems (GNSS) and Global Positioning Systems (GPS) applications. In smart…”
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A 0.6 V, 3.3 nW, Adjustable Gaussian Circuit for Tunable Kernel Functions by Alimisis, Vassilis, Gourdouparis, Marios, Dimas, Christos, Sotiriadis, Paul P.

“…This work introduces a compact, ultra-low power (3.3nW) Gaussian circuit architecture for Kernel function emulation. It has independent and electronically…”
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Injection-Locked Ring Oscillator based Phase-Lacked-Loop for 1.6 Gbps Clock Recovery by Vert, D., Begueret, J-B., Pignol, M., Malou, F., Lebre, V., Moutaye, E.

“…This paper submits a proof of concept of an injection-locked Phase-Locked-Loop (PLL) in 180 nm CMOS technology. The target data rate is 1.6 Gbps with a supply…”
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Accuracy and Size Trade-off of a Cartesian Genetic Programming Flow for Logic Optimization by Berndt, Augusto, Campos, Isac S., Lima, Bryan, Grellert, Mateus, Carvalho, Jonata T., Meinhardt, Cristina, De Abreu, Brunno A.

“…Logic synthesis tools face tough challenges when providing algorithms for synthesizing circuits with increased inputs and complexity. Traditional approaches…”
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0.5 V 19 nW Smart Temperature Sensor for Ultra-Low-Power CMOS Applications by Lott, Daniel C., Colombo, Dalton Martini

“…The smart temperature sensor measures the room temperature and converts it to the digital domain, thus making it easier to process and store data. This work…”
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Modeling of Reconfigurable ΣΔ Modulator for Multi-standard Wireless Receivers in Verilog-A by Castro, Mateus, Souza, Raphael, Agord, Manera, Leandro, Lima, Eduardo

“…This paper presents the modeling and design of a reconfigurable \Sigma\Delta modulator in Verilog-A language for applications in multi-standard wireless…”
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Soft Error Tolerant Quasi-Delay Insensitive Asynchronous Circuits: Advancements and Challenges by Sakib, Ashiq A.

“…Susceptibility to soft errors caused by radiation or other noise sources is a major concern for devices operating with limited supply voltages at scaled…”
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Exploring Constant Signal Propagation to Optimize Neural Network Circuits by Berndt, Augusto, Meinhardt, Cristina, Reis, Andre I., Butzen, Paulo F.

“…Deep neural networks tend to be extensively power and area consuming for their processing hardware. Integrated circuit designers face a considerable challenge…”
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Evaluating the Performance, Energy and Area Tradeoffs of ATHENA in Superscalar Processors by Silva Junior, Francisco Carlos, Silva, Ivan Saraiva, Jacobi, Ricardo Pezzuol

“…Coarse-Grained Reconfigurable architectures (CGRA) have been widely used as accelerator, providing energy saving and performance improvements while also offers…”
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A Latching Current Limiter with Telemetries for Space Applications by Galvis Chacon, Ronald Hassib, Dias, Agnaldo Vieira, Dos Santos, Angela Alves, Secheusk, Paula Cristiane, Manea, Silvio, Diniz, Jose Alexandre, Finco, Saulo

“…In electrical power systems, current limiting circuits are necessary to protect loads and isolate faults to keep the entire network stable. These types of…”
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Asymmetric Aging Avoidance EDA Tool by Gabbay, Freddy, Mendelson, Avi, Salameh, Basel, Ganaiem, Majd

“…The latest process technologies have become highly susceptible to asymmetric aging, whereby the timing of logical elements degrades at unequal rates over the…”
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Edge Verification: Ensuring Correctness under Resource Constraints by Drechsler, Rolf, Dominik, Caroline

“…Verification is one of the central tasks in circuit and system design. Since the components are used in several safety critical applications, functional…”
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Multifunctional auricular vagus nerve stimulator for closed-loop application by Dabiri, Babak, Zeiner, Klaus, Nativel, Arnaud, Kaniusas, Eugenijus

“…Auricular vagus nerve stimulation (aVNS) is a novel neuromodulatory therapy used in the treatment of various types of chronic systemic disorders. Currently,…”
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Artificial Neural Network Based Automatic Modulation Classification System Applied to FPGA by De Castro, Adenilson F., Milleo, Ronny S. R., Lolis, Luis H. A., Mariano, Andre A.

“…The wireless communication systems face rapid growth, driven by advances in new technologies such as the 5G and the Internet of Things. However, this growth…”
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Improving energy efficiency by transparently sharing SIMD Execution Units in Assymetric Multicores by Vieira, Caio, Schneider Beck, Antonio Carlos

“…Single-ISA Asymmetric multicore architectures (e.g., ARM big.LITTLE) combine high-performance and energy efficiency in the same chip by providing different…”
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Reflect3d: An Adaptive and Fault-Tolerant Routing Algorithm for Vertically-Partially-Connected 3D-NoC by Da Silva, Alexandre Almeida, E Silva Junior, Leonel Maia, Coelho, Alexandre, Silveira, Jarbas, Marcon, Cesar

“…The combined benefits of the Three-Dimensional (3D) and Network-on-Chip (NoC) schemes enable designing a high-performance system in a limited chip area. The…”
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Exploration of a Low-power CMOS Voltage Squarer by Costa, Victor O., Aita, Andre L., Cardoso, Adilson J., Rodrigues, Cesar R., Marques, Jefferson Luiz B.

“…This paper addresses a reported voltage multiplier and explores its use as a voltage squarer with the aim of reducing the power consumption and area. The…”
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A method to join the On-set and Off-set of an incompletely boolean function into a single BDD by Peralta, Renato D., Nespolo, Joao P., Butzen, Paulo F., Kolberg, Mariana L., Reis, Andre I.

“…Incompletely specified Boolean functions (a.k.a. Boolean Relations) are defined by their On-set, Off-set, and dc-set (don't care set). As the dc-set can be…”
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Configurable Approximate Hardware Accelerator to Compute SATD and SAD Metrics for Low Power All-Intra High Efficiency Video Coding by Lima, Victor H. S., Stigger, Matheus F., Soares, Leonardo B., Diniz, Claudio M., Bampi, Sergio

“…Connecting billions of network cameras to the cloud is a challenge that heavily taxes the network bandwidth for video transmissions. High Efficiency Video…”
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ETCG: Energy-Aware CPU Thread Throttling for CPU-GPU Collaborative Environments by Knorst, Tiago, Jordan, Michael G., Lorenzen, Arthur F., Rutzig, Mateus Beck, Schneider Beck, Antonio Carlos

“…High-Performance computing systems have been constantly adopting CPU-GPU architectures as a collaborative environment to accelerate applications by…”
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