Search Results - "2019 IEEE International Reliability Physics Symposium (IRPS)"

Comprehensive Study for OFF-State Hot Carrier Degrdation of Scaled nMOSFETs in DRAM by Lee, Nam-Hyun, Kim, Jongkyun, Son, Donghee, Kim, Kangjun, Seok, Jung Eun

“…In this paper, comprehensive study for OFF-state hot carrier degradation of scaled nMOSFETs in DRAM was examined using devices with different effective channel…”
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Perimeter Driven Transport in the p-GaN Gate as a Limiting Factor for Gate Reliability by Stoffels, S., Posthuma, N., Decoutere, S., Bakeroot, B., Tallarico, A.N., Sangiorgi, Enrico, Fiegna, Claudio, Zheng, J., Ma, X., Borga, M., Fabris, Elena, Meneghini, M., Zanoni, E., Meneghesso, G., Priesol, J., Satka, A.

“…In this paper, we present an in-depth study of the gate leakage mechanisms and correlated breakdown of GaN-based power HEMTs with p-GaN gate, controlled by a…”
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UV-Assisted Probing of Deep-Level Interface Traps in GaN MISHEMTs and Their Role in Threshold Voltage & Gate Leakage Instabilities by Dutta Gupta, Sayak, Joshi, Vipin, Shankar, Bhawani, Shikha, Swati, Raghavan, Srinivasan, Shrivastava, Mayank

“…This work demonstrates UV assisted probing of deep level traps in dielectric/GaN interface. The deep level donor traps lead to threshold voltage and gate…”
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Tolerance of Deep Neural Network Against the Bit Error Rate of NAND Flash Memory by Hasan, Mehedi, Ray, Biswajit

“…Flash memory can store large number of model weights for a deep neural network on edge devices. In this paper, we study the effects of Flash's bit-error-rate…”
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Process-induced anomalous current transport in graphene/InAlN/GaN heterostructured diodes by Satterthwaite, Peter F., Yalamarthy, Ananth Saran, Vaziri, Sam, Rojo, Miguel Munoz, Pop, Eric, Senesky, Debbie G.

“…Graphene and III-nitride semiconductors are promising materials platforms for the development of high-frequency, high-power electronic devices. Successful…”
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Bias Temperature Instability Reliability in Stacked Gate-All-Around Nanosheet Transistor by Wang, Miaomiao, Zhang, Jingyun, Zhou, Huimei, Southwick, Richard G., Kuo Chao, Robin Hsin, Miao, Xin, Basker, Veeraraghavan S., Yamashita, Tenko, Guo, Dechao, Karve, Gauri, Bu, Huiming, Stathis, James H.

“…In this paper, we report the bias temperature instability (BTI) reliability in stacked gate-all-around (GAA) nanosheet (NS) devices. We show that, in addition…”
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Permanent and Transient Effects of High-Temperature Bias Stress on Room- Temperature V Drift Measurements in SiC Power MOSFETs by Habersat, Daniel B., Green, Ronald, Lelis, Aivars J.

“…Differences in the bias-temperature-stress response of SiC MOSFETs result from the complex interaction of the charge trapping mechanisms responsible for…”
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mu s-Range Evaluation of Threshold Voltage Instabilities of GaN-on-Si HEMTs with p-GaN Gate by Canato, E., Masin, F., Borga, M., Zanoni, E., Meneghini, M., Meneghesso, G., Stockman, A., Banerjee, A., Moens, P.

“…We propose a technique to evaluate the time-dependence of the threshold voltage instabilities in GaN-based normally-off transistors under positive gate bias…”
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Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices by O'Sullivan, B.J., Ritzenthaler, R., Rzepa, G., Wu, Z., Litta, E. Dentoni, Richard, O., Conard, T., Machkaoutsan, V., Fazan, P., Kim, C., Franco, J., Kaczer, B., Grasser, T., Spessot, A., Linten, D, Horiguchi, N.

“…Potential solutions for the reliability challenges of high- k metal gate (HKMG) integration into DRAM high-voltage peripheral logic devices are reported. A…”
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Array-Based Statistical Characterization of CMOS Degradation Modes and Modeling of the Time-Dependent Variability Induced by Different Stress Patterns in the \}, \boldsymbol}\} bias space by Bury, E., Chasin, A., Vandemaele, M., Van Beek, S., Franco, J., Kaczer, B., Linten, D.

“…Degradation mechanisms, such as Bias Temperature Instabilities (BTI) and Hot Carrier Degradation (HCD), as well as the associated time-dependent variability,…”
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Full ( V},\ V}) Bias Space Modeling of Hot-Carrier Degradation in Nanowire FETs by Vandemaele, Michiel, Kaczer, Ben, Tyaginov, Stanislav, Stanojevic, Zlatan, Makarov, Alexander, Chasin, Adrian, Bury, Erik, Mertens, Hans, Linten, Dimitri, Groeseneken, Guido

“…Simulations of hot-carrier degradation of nanowire field-effect transistors are reported. The simulations rely on the carrier energy distribution function,…”
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Reliability Challenges with Materials for Analog Computing by Cartier, Eduard A., Kim, Wanki, Gong, Nanbo, Gokmen, Tayfun, Frank, Martin M., Bishop, Douglas M., Kim, Youngseok, Kim, Seyoung, Ando, Takashi, Wu, Ernest Y., Adusumilli, Praneet, Rozen, John, Solomon, Paul M., Haensch, Wilfried, BrightSky, Matthew J., Sebastian, Abu, Burr, Geoffrey W., Narayanan, Vijay

“…Specialized hardware for deep learning using analog memory devices has the potential to outperform conventional GPUs by a large margin. At the core of such…”
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Characterization and Analysis of Bit Errors in 3D TLC NAND Flash Memory by Papandreou, Nikolaos, Pozidis, Haralampos, Parnell, Thomas, Ioannou, Nikolas, Pletka, Roman, Tomic, Sasa, Breen, Patrick, Tressler, Gary, Fry, Aaron, Fisher, Timothy

“…3D NAND flash memory has entered dynamically into the space of enterprise server and storage systems, offering significantly higher capacity and better…”
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VTH-Hysteresis and Interface States Characterisation in SiC Power MOSFETs with Planar and Trench Gate by Asllani, Besar, Castellazzi, Alberto, Salvado, Oriol Avino, Fayyaz, Asad, Morel, Herve, Planson, Dominique

“…This paper contributes to investigations on the threshold-voltage (V_{TH}) hysteresis in SiC power MOSFETs. Such effect is of relevance mainly for…”
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New Insights into the Imprint Effect in FE-HfO2 and its Recovery by Higashi, Y., Florent, K., Subirats, A., Kaczer, B., Di Piazza, L., Clima, S., Ronchi, N., McMitchell, S. R. C., Banerjee, K., Celano, U., Suzuki, M., Linten, D., Van Houdt, J.

“…The mechanism of imprint in FE-HfO 2 is investigated in detail. It is clearly shown that the imprint can be recovered by additional pulses and domain switching…”
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A Physical-Statistical Approach to AlGaN/GaN HEMT Reliability by Moens, Peter, Stockman, Arno

“…This paper proposes a physical-statistical approach to AIGaN/GaN HEMT reliability applied to forward gate bias stress. The Ig- V g characteristics are fitted…”
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Time Dependent Dielectric Breakdown of Cobalt and Ruthenium Interconnects at 36nm Pitch by Huang, H., McLaughin, P. S., Kelly, J. J., Yang, C. -C., Southwick, R. G., Wang, M., Bonilla, G., Karve, G.

“…Time dependent dielectric breakdown (TDDB) properties of cobalt and ruthenium interconnects were investigated in 36 nm pitch dual damascene test vehicles. We…”
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Reliability of 8Mbit Embedded-STT-MRAM in 28nm FDSOI Technology by Ji, Y., Goo, H. J., Lim, J., Lee, S. B., Lee, S., Uemura, T., Park, J. C., Han, S. I., Shin, S. C., Lee, J. H., Song, Y. J., Lee, K. M., Shin, H. M., Hwang, S. H., Seo, B. Y., Lee, Y. K., Kim, J. C., Koh, G. H., Park, K. C., Pae, S., Jeong, G. T., Yoon, J. S., Jung, E. S.

“…STT-MRAM has great attention as next generation memory to replace commercialized memory. However, not many articles are available on various MRAM reliability…”
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A New Approach to Validate GaN FET Reliability to Power-Line Surges Under Use-Conditions by Bahl, Sandeep R., Brohlin, Paul

“…The robustness of FETs to power-line surges has a tremendous impact on field reliability and is an important consideration for the adoption of new technologies…”
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Surrogate Model Assisted Design of Silicon Anode Considering Lithiation Induced Stresses by Zheng, Zhuoyuan, Chen, Bo, Gurumukhi, Yashraj, Cook, John, Ates, Mehmet N., Miljkovic, Nenad, Braun, Paul V., Wang, Pingfeng

“…Silicon-based lithium ion battery anodes are attracting considerable attention due to their high theoretical capacity. However, the significant volume change…”
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