Search Results - "2019 China Semiconductor Technology International Conference (CSTIC)"

Investigation of Quantum-Dot Characteristic Based on Different Bulk Silicon FinFET Device Models by Gu, Jie, Hou, Zhaozhao, Yao, Jiaxin, Wu, Zhenhua, Yin, Huaxiang

“…In this work, we present a kind of new device models based on bulk silicon FinFET for quantum computation with quantum dots. A single quantum dot can be…”
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A Study of LDMOS BV Improvement by Gate Architecture Optimization by Fang, Ziquan, Xu, Zhaozhao, Qian, Wensheng

“…In this paper, various gate architectures of stepped gate oxide LDMOS are studied and multiple experiments are performed using two-dimensional TCAD simulation…”
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Z2-FET: a multi-functional device used for photodetection by Liu, J., Cao, XY, Lu, BR, Chen, YF, Zaslavsky, A., Cristoloveanu, S., Bawedin, M., Wan, J.

“…In this work, we explore the application of Z 2 -FET in photodetection with TCAD simulation. Dynamic coupling effect is used to build up the carrier injection…”
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Single Particle Inductivley Coupled Plasma Mass Spectrometry Metrology for Advanced Semiconductor Process Development by Chan, Qilin, Wang, Waldo, Zazzera, Larry, Simpson, Alex, Stomberg, Jaimie, Entezarian, Majid, Lei, Daniel, Ellefson, Mark, Mader, Brian, Zhou, Jinsheng

“…This work describes advanced metrology based on Single Particle Inductively Coupled Plasma Mass Spectrometry (spICP-MS) for evaluating ultra-pure chemicals…”
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Batch Atomic Layer Deposition of Aluminum Nitride for RF-MEMS and GAN Power-Devices by Zhu, Zhen, Ostreng, Erik, Tuoriniemi, Iiris, Chen, Zhenzi, Niiranen, Kalle, Sneck, Sami

“…We report for the first-time batch process of atomic layer deposition (ALD) for aluminum nitride (AlN). Ammonia (NH 3 ) was used as the nitrogen source, while…”
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Investigation on LDMOS Characteristics of Layout Dependence in FinFET Technology by Wang, Gang, Lee, Byunghak, Ma, Guiying, Wang, Nan, Tang, Mike, Ding, Kellin, zhou, Breeze, Ju, Jianhua

“…The characteristics of a laterally diffused metal oxide semiconductor (LDMOS) with different layout structures is investigated based on 14nm FinFET technology…”
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Towards Efficient Neural Networks On-A-Chip: Joint Hardware-Algorithm Approaches by Du, Xiaocong, Krishnan, Gokul, Mohanty, Abinash, Li, Zheng, Charan, Gouranga, Cao, Yu

“…Machine learning algorithms have made significant advances in many applications. However, their hardware implementation on the state-of-the-art platforms still…”
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New Understanding of Negative Capacitance Devices for Low-Power Logic Applications by Huang, Qianqian, Wang, Huimin, Zhao, Yang, Yang, Mengxuan, Liang, Zhongxin, Zhu, Kunkun, Huang, Ru

“…This paper presents the new physical understanding of negative capacitance (NC) and hysteresis behaviors in ferroelectric-based NC-FETs for low-power logic…”
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Optimal Design of Heat Dissipation Structure of IGBT Modules Based on Graphene by Zhao, Hao, Bao, Jie, Xu, Yuan, Xu, Wenyi

“…With the emergence and rapid development of new energy vehicles, as their core devices, IGBT modules become more and more important. Heat dissipation issue is…”
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Permanent Bonding Process Development Using Gapless Glue for CIS-TSV Wafer Level Packaging by Wang, Chengqian, Liu, Yi, Zhang, Meng, Ma, Shuying, Xiao, Zhiyi, Yu, Daquan

“…Permanent bonding of glass wafer with cavity wall (CW) and sensor wafer is the key technology for CMOS Image Sensor (CIS) wafer level packaging. But such…”
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Cavity Substrate Technology for SIP Application with Passive Components by Lee, Ken, Kim, Min Sung, Lee, Jong Tae, Jeon, Dong Ju, Jang, Eun Ju, Lee, Kyu Jin

“…The application of SiP (System in Package) is increased because of its benefit of fast development and cost-effectiveness compared to SOC (System on Chip)…”
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Cobalt Electrofill for Future Generations of Contacts and Interconnects by Spurlin, Tighe A., Rigsby, Matthew A., Brogan, Lee, Doubina, Natalia, Liu, Yihua, Opocensky, Edward, Zhou, Jian, Reid, Jonathan

“…In traditional copper damascene interconnect electroplating baths, three organic additives (accelerator, suppressor, leveler) are used to produce void-free…”
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Inversions Optimization in XOR-Majority Graphs with an Application to QCA by Shi, Lei, Chu, Zhufei

“…Inversions are indispensable to build a logically complete Boolean system. However, the implementations of inversion in some nanotechnologies are expensive…”
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Efficient FPGA Emulation of Quantum Fourier Transform by Qian, Yu, Wang, Mingyu, Chen, Jialin, Wang, Lingli, Feng, Zhihua

“…Quantum computation shows its great advantage on exponential speed-up for some complex algorithms. Compared to software simulation with sequential execution,…”
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Surface Smoothing And Roughening Effects of High-k Dielectric Materials Deposited by Atomic Layer Deposition and Their Significance for MIM Capacitors Used in DRAM Technology by Lau, W.S.

“…Previously, the author suggested that the atomic layer deposition (ALD) of an amorphous high-k dielectric thin film has a surface smoothing effect on a rough…”
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Overview of a FPGA-Based Overlay Processor by Yu, Yunxuan, Wu, Chen, Shi, Xiao, He, Lei

“…This paper presents the overview of an overlay architecture on FPGA (OPU). It is applicable to general CNN acceleration with software like programmablility and…”
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Advanced Multifunctional Temporary Bonding Materials with Heterogeneous Integrated Properties for Various Advanced Packaging Applications by Liu, Xiao, Bai, Dongshun, Kirchner, Lisa, Puligadda, Rama, Flaim, Tony

“…There is always an increasing demand for new materials with unique properties as technical enablers to facilitate different semiconducting advanced packaging…”
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Optimization of RF performance and reliability of 28V RF-LDMOS by Cai, Ying, Zhou, hengliang, Mo, Haifeng, Peng, Hu, Zhang, Yaohui, Yang, Jiye, Huang, Jingfeng, Yu, Han, Li, Junlang

“…Here is presented an optimized RF-LDMOS (Radio Frequency Lateral Double Diffused MOS) structure with double grounded G-shield and multiple drift region…”
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Influence of SiGe on Parasitic Parameters in PMOS by Sun, Bing Qi, De Chen, Yu, Wang, Chen, Huang, Jacky, Sun, Qing Qing, Zhang, David

“…In this paper, simulation-based design-technology co-optimization (DTCO) is carried out using the Coventor SEMulator3D® virtual fabrication platform with its…”
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Nanometer-Thin Pure B Layers Grown by MBE as Metal Diffusion Barrier on GaN Diodes by Thammaiah, Shivakumar D., Hansen, John Lundsgaard, Nanver, Lis K.

“…Pure boron layers, deposited by molecular beam epitaxy (MBE) on AlGaN/GaN/p-Si substrates to a thickness of ~ 7 nm, were applied as barriers to aluminum…”
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