Search Results - "2018 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)"

Work-in-Progress: Quantized NNs as the Definitive Solution for Inference on Low-Power ARM MCUs? by Rusci, Manuele, Capotondi, Alessandro, Conti, Francesco, Benini, Luca

“…High energy efficiency and low memory footprint are the key requirements for the deployment of deep learning based analytics on low-power microcontrollers…”
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Special Session: Future Automotive Systems Design: Research Challenges and Opportunities by Saidi, Selma, Steinhorst, Sebastian, Hamann, Arne, Ziegenbein, Dirk, Wolf, Marko

“…Automotive systems are currently undergoing a radical shift in the way they are designed, implemented and deployed. Such changes impose an increased complexity…”
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Keynote: Internet of Things or Threats? On Building Trust in IoT by Miettinen, Markus, Sadeghi, Ahmad-Reza

“…The Internet of things (IoT) is rapidly emerging with the goal to connect the unconnected. Many new device manufacturers are entering the market of…”
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Work-in-Progress: A High-Bandwidth Snappy Decompressor in Reconfigurable Logic by Fang, Jian, Chen, Jianyu, Al-Ars, Zaid, Hofstee, Peter, Hidders, Jan

“…While in-memory databases have largely removed I/O as a bottleneck for database operations, loading the data from storage into memory remains a significant…”
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Work-in-Progress: WinoNN: Optimising FPGA-based Neural Network Accelerators using Fast Winograd Algorithm by Wang, Xuan, Wang, Chao, Zhou, Xuehai

“…In this paper, we present WinoNN, which utilizes fast Winograd algorithm to optimize FPGA-based neural network accelerators. In particular, Winograd algorithm…”
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Work-in-Progress: Hierarchical Ensemble Learning for Resource-Aware FPGA Computing by Wang, Hongfei, Li, Jianwen, He, Kun, Cai, Wenjie

“…Recent years witness the rapid development in hardware/software codesign that integrates machine learning (ML) models with hardware systems [1]-[4]. Despite…”
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Work-in-Progress: Introducing Assume-Guarantee Contracts for Verifying Robotic Applications by Spellini, Stefano, Lora, Michele, Chattopadhyay, Sudipta, Fummi, Franco

“…This paper summarizes the first steps toward an automatic framework, relying on Assume-Guarantee Contracts, for the verification of robotics applications…”
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Work-in-Progress: On Leveraging Approximations for Exact System-level Design Space Exploration by Neubauer, Kai, Haubelt, Christian, Wanko, Philipp, Schaub, Torsten

“…In order to find good design points for embedded systems, an efficient exploration of the design space is imperative. The ever-increasing complexity of…”
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Enhanced Resilient Sensor Attack Detection Using Fusion Interval and Measurement History by Yang, Kang, Wang, Rui, Jiang, Yu, Luo, Chenxia, Guan, Yong, Li, Xiaojuan, Shi, Zhiping

“…For the Cyber-Physical Systems which are equipped with multiple sensors that measure the same physical variables, some of the sensors may be subject to…”
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Work-in-Progress: Runtime Requirements Monitoring for State-based Hardware by Seo, Minjun, Lysecky, Roman

“…This paper presents a requirements-driven methodology enabling efficient runtime monitoring of hardware in embedded systems. We present a novel method for…”
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Work-in-Progress: Dynamic Data Management for Automotive ECUs with Hybrid RAM-NVM Memory by Zhan, Jinyu, Yang, Junhuan, Jiang, Wei, Li, Yixin

“…Non-Volatile Memory (NVM) can be utilized to improve performance of automotive electronic systems, but frequent writings on NVM will decrease its lifetime. In…”
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Work-in-Progress: Hardware Implementation of a Multi-Mode-Aware Mixed-Criticality Scheduler by Hounsinou, Sena, Vasu, Aishwarya, Ramaprasad, Harini

“…To minimize size, weight, power, and cost, the industry aims at consolidating different criticality applications on the same hardware platform. In such a…”
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Work-in-Progress: AMVP - A High Performance Virtual Platform using Parallel SystemC for Multicore ARM Architectures by Weinstock, Jan Henrik, Bucs, Robert Lajos, Walbroel, Florian, Leupers, Rainer, Ascheid, Gerd

“…This paper presents AMVP - a SystemC based simulator for ARM multicore platforms designed as a tool for early SW development during platform bring-up. It uses…”
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Work-in-Progress: Equivalence of Transformations of Synchronous Data Flow Graphs by Zhu, Xue-Yang

“…Synchronous data flow graphs (SDFGs) are widely used to model digital signal processing (DSP) algorithms and streaming applications. Any valid SDFG can be…”
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Work-in-Progress: Revisiting Wear Leveling Design on Compression Applied 3D NAND Flash Memory by Di, Yejia, Shi, Liang, Gao, Congming, Li, Qiao, Xue, Chun Jason

“…Compression has been demonstrated as an efficient method for lifetime improvement on flash memory. However, data compression ratios are various, which bring…”
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Message from Program Chairs

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Work-in-Progress: A Chip-Level Security Framework for Assessing Sensor Data Integrity by Wehbe, Taimour, Mooney, Vincent J., Keezer, David C.

“…The continuously increasing inter-connectivity of sensor nodes that form the basis of the Internet-of-Things results in new avenues of attack exploitable by…”
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Work-in-Progress: Co-Design of Security-Critical Real-Time Systems to Prevent Fault Injection Attacks by Jiang, Wei, Xiu, Liugen, Zhan, Jinyu, Jiang, Ke

“…We present a system-level co-design approach for security-critical real-time systems to resist fault injection attack. We focus on protecting the…”
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Work-in-Progress: Communication Optimization for Thermal Reliable Optical Network-on-Chip by Li, Mengquan, Liu, Weichen, Yang, Lei, Xie, Yiyuan, Ye, Yaoyao, Guan, Nan

“…Optical network-on-chip (ONoC) architecture offers excellent communication performance for unconflicted messages. However, extra communication delays and…”
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Work-in-Progress: Furion: Alleviating Overheads for Deep Learning Framework On Single Machine by Jin, Lihui, Wang, Chao, Gong, Lei, Xu, Chongchong, Hu, Yahui, Tan, Luchao, Zhou, Xuehai

“…Deep learning has been successful at solving many kinds of tasks. Hardware accelerators with high performance and parallelism have become mainstream to…”
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