Search Results - "2012 IEEE International Symposium on Hardware-Oriented Security and Trust"

Performance metrics and empirical results of a PUF cryptographic key generation ASIC by Meng-Day Mandel Yu, Sowell, R., Singh, A., M'Raihi, D., Devadas, S.

“…We describe a PUF design with integrated error correction that is robust to various layout implementations and achieves excellent and consistent results in…”
Get full text

Reliability enhancement of bi-stable PUFs in 65nm bulk CMOS by Bhargava, Mudit, Cakir, C., Mai, Ken

“…We demonstrate the efficacy and associated costs of three reliability enhancing techniques for bi-stable PUF designs (SRAM and sense amplifier-based) -…”
Get full text

Reverse engineering circuits using behavioral pattern mining by Wenchao Li, Wasson, Z., Seshia, S. A.

“…Systems are increasingly being constructed from off-the-shelf components acquired through a globally distributed, untrusted supply chain. The lack of trust in…”
Get full text

Complementary IBS: Application specific error correction for PUFs by Hiller, M., Merli, D., Stumpf, F., Sigl, G.

“…In this contribution, we present Complementary Index-Based Syndrome coding (C-IBS), a new and flexible fuzzy embedder for Physical Unclonable Functions (PUFs)…”
Get full text

Evaluating security requirements in a general-purpose processor by combining assertion checkers with code coverage by Bilzor, M., Huffmire, T., Irvine, C., Levin, T.

“…The problem of malicious inclusions in hardware is an emerging threat, and detecting them is a difficult challenge. In this research, we enhance an existing…”
Get full text

Trojan detection based on delay variations measured using a high-precision, low-overhead embedded test structure by Lamech, C., Plusquellic, J.

“…The horizontal dissemination of the chip fabrication industry has raised new concerns over Integrated Circuit (IC) Trust, in particular, the threat of…”
Get full text

A novel method for watermarking sequential circuits by Lewandowski, Matthew, Meana, R., Morrison, M., Katkoori, S.

“…We propose a novel technique to watermark sequential circuits by embedding a signature via state encoding. The proposed technique is a greedy heuristic for the…”
Get full text

HTOutlier: Hardware Trojan detection with side-channel signature outlier identification by Zhang, Jie, Yu, Haile, Xu, Qiang

“…Hardware Trojan (HT) is a growing concern for the semiconductor industry. As a non-invasive and inexpensive approach, side-channel analysis methods based on…”
Get full text

SDMLp: On the use of complementary Pass transistor Logic for design of DPA resistant circuits by Ramakrishnan, L. N., Chakkaravarthy, M., Manchanda, A. S., Borowczak, M., Vemuri, R.

“…The emergence and proliferation of Smart Cards and other security-centric technologies require ongoing advancement in secure-IC design. We propose advanced IC…”
Get full text

Functional integrated circuit analysis by Nedospasov, D., Seifert, J.-P, Schlosser, A., Orlic, S.

“…This work introduces a novel, automated methodology for performing functional analysis of integrated circuits (ICs), such as microcontrollers and smart cards…”
Get full text

Improved algebraic side-channel attack on AES by Mohamed, M. S. E., Bulygin, S., Zohner, M., Heuser, A., Walter, M., Buchmann, J.

“…In this paper we present improvements of the algebraic side-channel analysis of the Advanced Encryption Standard (AES) proposed in [1]. In particular, we…”
Get full text

Glitch-free implementation of masking in modern FPGAs by Moradi, A., Mischke, O.

“…Due to the propagation of the glitches in combinational circuits side-channel leakage of the masked S-boxes realized in hardware is a known issue. Our…”
Get full text

Detection of probing attempts in secure ICs by Manich, S., Wamser, M. S., Sigl, G.

“…Physical attacks focus on extracting information from internal parts of IC's. One way to achieve this is by means of connecting probes to wires, so that the…”
Get full text

HSDL: A Security Development Lifecycle for hardware technologies by Khattri, H., Mangipudi, N. K. V., Mandujano, S.

“…Security assurance is a rapidly evolving but well understood discipline in the software industry. Many firms have adopted the Security Development Lifecycle as…”
Get full text

t-Private logic synthesis on FPGAs by Jungmin Park, Tyagi, A.

“…A t-private circuit reveals no information about any internal logic node with up to t probes each cycle. In this paper, we propose efficient t-private logic…”
Get full text

Design solutions for securing SRAM cell against power analysis by Rozic, V., Dehaene, W., Verbauwhede, I.

“…Side channel attacks exploit physical imperfections of hardware to circumvent security features achieved by mathematically secure protocols and algorithms…”
Get full text

Buskeeper PUFs, a promising alternative to D Flip-Flop PUFs by Simons, P., van der Sluis, E., van der Leest, Vincent

“…Cloning, theft of service and tampering have become serious threats on the revenue and reputation of hardware vendors. To protect their products against these…”
Get full text

Fault Round Modification Analysis of the advanced encryption standard by Dutertre, J., Mirbaha, Amir-Pasha, Naccache, D., Ribotta, Anne-Lise, Tria, A., Vaschalde, T.

“…This paper describes a new physical analysis technique based on changing the number of the AES rounds. It is an extension of the already known Round Reduction…”
Get full text

On charge sensors for FIB attack detection by Helfmeier, Clemens, Boit, C., Kerst, U.

“…A new sensor of Focused Ion Beam (FIB) attacks on security sensitive ICs is presented. The function is based on the FIB navigation process mandatory for FIB…”
Get full text

Interacting with Hardware Trojans over a network by Farag, M. M., Lerner, L. W., Patterson, C. D.

“…Hardware Trojan horses (HTHs) are emerging threats to integrated circuits (ICs) outsourced to a global supply chain or developed with untrusted tools and…”
Get full text