Search Results - "2008 NORCHIP"

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  1. 1

    A 1W Class-D Audio Power Amplifier in a 0.35μm CMOS Process by Kin-Keung Lee, Yelin Wang, Qingyuan Zhang, Sjoland, H.

    Published in 2008 NORCHIP (01-11-2008)
    “…A fully integrated class-D audio power amplifier for mobile applications is presented. The amplifier is realized in a 0.35 μm CMOS process featuring 3.3 V and…”
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    Conference Proceeding
  2. 2

    An Exact Breadth-First Search Algorithm for the Multiple Constant Multiplications Problem by Aksoy, L., Gunes, E.O., Flores, P.

    Published in 2008 NORCHIP (01-11-2008)
    “…This paper addresses the multiplication of one data sample with multiple constants using addition/subtraction and shift operations, i.e., the multiple constant…”
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    Conference Proceeding
  3. 3

    Divide-and-Conquer Matrix Inversion for Linear MMSE Detection in SDR MIMO Receivers by Eberli, S., Cescato, D., Fichtner, W.

    Published in 2008 NORCHIP (01-11-2008)
    “…Software-defined radio (SDR) platforms represent a promising approach to facing the demands of the fast evolving field of wireless communications. The…”
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    Conference Proceeding
  4. 4

    Power Harvesting Circuits in 90 nm CMOS by Halvorsen, T.K., Hjortland, H.A., Lande, T.S.

    Published in 2008 NORCHIP (01-11-2008)
    “…The purpose of this paper is to explore power harvesting capabilities in nanometer technology. Novel charge pump improvements using the back-gate or well of…”
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    Conference Proceeding
  5. 5

    Low-Voltage, Low-Power, and Wide-Tuning-Range Ring-VCO for Frequency ΔΣ Modulator by Tuan-Vu Cao, Wisland, D.T., Lande, T.S., Moradi, F.

    Published in 2008 NORCHIP (01-11-2008)
    “…A low-voltage, low-power, and wide-tuning-range VCO which converts an analog input voltage to phase information for a frequency ΔΣ modulator is proposed in…”
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    Conference Proceeding
  6. 6

    Partial Reconfiguration Applied in an On-line Evolvable Pattern Recognition System by Torresen, J., Senland, G.A., Glette, K.

    Published in 2008 NORCHIP (01-11-2008)
    “…One of the main challenges with autonomous adaptable systems is the lack of hardware flexibility. However, reconfigurable logic is a promising technology for…”
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    Conference Proceeding
  7. 7

    Future RFID and Wireless Sensors for Ubiquitous Intelligence by Li-Rong Zheng, Nejad, M.B., Zhuo Zou, Mendoza, D.S., Zhi Zhang, Tenhunen, H.

    Published in 2008 NORCHIP (01-11-2008)
    “…Next generation RFID towards ubiquitous wireless sensing and identification requires high network throughput along with long operation range and ultra low…”
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    Conference Proceeding
  8. 8

    A 2.5-GS/s 30-mW 4-bit Flash ADC in 90nm CMOS by Sundstrom, T., Alvandpour, A.

    Published in NORCHIP (01-11-2008)
    “…A 2.5 GS/s flash ADC, fabricated in 90 nm CMOS, avoids traditional power, speed and accuracy trade-offs by using comparator redundancy with power-gating…”
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    Conference Proceeding
  9. 9

    Using Positive Feedback Adiabatic Logic to implement Reversible Toffoli Gates by Willingham, D.J., Kale, I.

    Published in 2008 NORCHIP (01-11-2008)
    “…A reversible, positive feedback adiabatic logic circuit is presented, which by implementing the universal Toffoli gate demonstrates that reversible logic…”
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    Conference Proceeding
  10. 10

    Low-Voltage Bulk-Driven Mixers in 45nm CMOS for Ultra-Wideband TX and RX by Schmitz, O., Hampel, S.K., Orlob, C., Tiebout, M., Rolfes, I.

    Published in 2008 NORCHIP (01-11-2008)
    “…This paper presents fully differential up-and down-conversion mixers manufactured in a triple well 45 nm standard CMOS process for low voltage UWB TX and RX…”
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    Conference Proceeding
  11. 11

    An Automatic Gain Control Front-End Optical Receiver for Multi-Level Data Transmission by Atef, M., Swoboda, R., Zimmermann, H.

    Published in 2008 NORCHIP (01-11-2008)
    “…A receiver optoelectronic integrated circuit (OEIC) with integrated PIN photodiode, an automatic gain control transimpedance amplifier, linear post amplifier…”
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    Conference Proceeding
  12. 12

    Investigation of First-Order Digital Bang-Bang Phase-Locked Loops with Reference Clock Jitter by Tertinek, S., Feely, O.

    Published in 2008 NORCHIP (01-11-2008)
    “…Bang-bang phase-locked loops (BBPLLs) are a class of PLLs with a binary-quantized phase detector (BPD). They are widely used in clock and data recovery…”
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    Conference Proceeding
  13. 13

    Instruction Set Enhancements for High-Performance Multicore Execution on the REALJava Platform by Tyystjarvi, J., Saantti, T., Plosila, J.

    Published in 2008 NORCHIP (01-11-2008)
    “…This paper presents instruction set enhancements for improving the performance of multicore execution of Java bytecode on the REALJava virtual machine. The…”
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    Conference Proceeding
  14. 14

    Learning from the Primary Visual Cortex to Recover Vision for the Blind by Microstimulation by Sawan, M., Gosselin, B., Coulombe, J.

    Published in 2008 NORCHIP (01-11-2008)
    “…This paper covers circuits and systems techniques for the construction of high reliability biosensing and microneurostimulation medical devices. Such…”
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    Conference Proceeding
  15. 15

    CMOS Temperature Sensor Using Periodic Averaging for Error Reduction by Yucetas, M., Aaltonen, L., Halonen, K.

    Published in 2008 NORCHIP (01-11-2008)
    “…A fully integrated temperature sensor is implemented in a 0.35 mum CMOS technology. Sensor can measure the temperature with maximum inaccuracy of…”
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    Conference Proceeding
  16. 16

    A 130nm CMOS Programmable Operational Amplifier by Tomasik, J.M., Hafkemeyer, K.M., Galjan, W., Schroeder, D., Krautschneider, W.H.

    Published in 2008 NORCHIP (01-11-2008)
    “…In this work we present a programmable 1.2 V operational amplifier (OpAmp) realized in a standard 130 nm CMOS technology. The OpAmp is based on a 3 V…”
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    Conference Proceeding
  17. 17

    A 5.4GHz 90-nm CMOS Digitally Controlled LC Oscillator with 21% Tuning Range, 1.1MHz resolution, and 180dB FOM by Ping Lu, Sjoland, H.

    Published in 2008 NORCHIP (01-11-2008)
    “…A 5.4 GHz digitally controlled oscillator (DCO) has been implemented in a 90-nm CMOS process. It has three different frequency control words, coarse, medium,…”
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    Conference Proceeding
  18. 18

    A 20MS/s 11-bit Digital-to-Analog Converter Using a Combined Capacitor and Resistor Network by Davidovic, M., Nemecek, A., Zach, G., Zimmermann, H.

    Published in 2008 NORCHIP (01-11-2008)
    “…Within this work an 11-bit digital-to-analog converter (DAC) with a combined capacitor and resistor network is presented. The proposed topology contains a…”
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    Conference Proceeding
  19. 19

    Switched Capacitor Sample-and-Hold Circuit with Input Signal Range beyond Supply Voltage by Centurelli, F., Simonetti, A., Trifiletti, A.

    Published in 2008 NORCHIP (01-11-2008)
    “…A switched capacitor sample-and-hold (S/H) circuit with extended dynamic range beyond the supply voltage is presented. The proposed architecture includes a…”
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    Conference Proceeding
  20. 20

    60 GHz Amplifier Employing Slow-wave Transmission Lines in 65-nm CMOS by Sandstrom, D., Varonen, M., Karkkainen, M., Halonen, K.

    Published in 2008 NORCHIP (01-11-2008)
    “…A three-stage V-band amplifier implemented in 65-nm baseline CMOS technology is presented in this paper. Slow-wave coplanar waveguides are used for matching…”
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    Conference Proceeding