Search Results - "1986 Symposium on VLSI Technology. Digest of Technical Papers"

A New Soft-Error Immune DRAM Cell Using Stacked CMOS Structure by Terada, K., Kurosawa, S., Takeshima, T.

“…The conventional MOS dynamic RAM (DRAM) cell should be designed to keep enough stored-charge in order to avoid alpha-particle-induced soft errors. Even if DRAM…”
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Hole Trapping and Hot-Carrier Induced Device Instability in Thin Nitride/Oxide IGFETs by Young, K. K., Chan, T. Y., Hu, C., Oldham, W. G.

“…Owing to the increasing concerns regarding yield and reliability problems. high-integrity nitride/oxide stacked films have been investigated as replacement for…”
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Scaling CMOS Technologies with Constant Latch-Up Immunity by Lewis, Alan G., Martin, Russel A., Huang, Tiao Y., Chen, John Y., Bruce, Richard H.

“…High performance CMOS circuits can be realized by scaling device dimensions into the sub-micron range. However, this also improves the performance of the…”
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A High Throughput X-Ray Lithography with a Negative Resist for 0.3μm Devices by Suzuki, Y., Ishio, N., Eimori, T., Yoshioka, N., Yamazaki, T.

“…X-ray lithography , after years of technology development, is now emerging as a leading contender for submicoron VLSI printing. One of the most severe…”
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Speed Enhancements and Key Design Aspects of Charge Buffered Logic by Wiedmann, S. K., Wendel, D. F.

“…Recently a new bipolar complementary transistor logic called Charge Buffered Logic (CBL) has been proposed(1). This unique circuit concept features large…”
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Characterization of Trench Transistors for 3-D Memories by Banerjee, S. K., Shichujo, H., Nishimura, A., Shah, A. H., Pollack, G. P., Richardson, W. F., Bordelon, M., Malhi, S. D. S., Elahy, M., Womack, R. H., Wang, C. P., Gallia, J., Davis, H. E., Chatterjee, P. K.

“…An innovative, 9um^2 DRAM cell with both the pass transistor and the storage capacitor on the sidewall of a trench has been demonstrated in a 4MBit DRAM [1]…”
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A Hot Carrier Analysis Utilizing MINIMOS 3.0 by Hansch, W., Werner, C., Selberherr, S.

“…Modern VLSI-circuits require a high degree of miniaturization, which is in principle achieved by employing scaling laws. However, keeping the voltage supply on…”
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Rapid Thermal Annealing Process for Titanium-Silicide Contact Formation by Natsuaki, Nobuyoshi, Chyu, Kiyonori, Suzuki, Tadashi, Kobayashi, Nobuyoshi, Hashimoto, Naotaka, Wada, Yasuo

“…Self-aligned refractory-metal-silicide contact has been recognized as one of the keys to realizing the performance capabilities inherent in scaled-down VLSI's…”
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Technology for a 250V Monolithic Complementary MOSFFT LSJ with N+ Buried-Layer Protected CMOS Logic by Sakamoto, Kouzou, Okabe, Takeaki, Kimura, Masatoshi, Satonaka, Koichiro, Nishimura, Takanori

“…High-voltage LSIs with compatible logic are strongly required for support of flat panel displays such as PDP and EL panels. For these LSIs, isolation type IC…”
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Two-Dimensional Simulation of Glass Reflow and Silicon Oxidation by Sutardja, Pantas, Shacham-Diamand, Yosi, Oldham, W. G.

“…A general-purpose program for the two-dimensional (2D) simulation of processes with moving boundaries has been written. The program is capable of simulating…”
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Quantum Semiconductor Devices by Reed, Mark A.

“…The construction of a quantum electronics technology will involve a concentrated effort in basic device physics, advanced fabrication, and novel architectures…”
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A Simple Holding Voltage Analysis for Latchup in Epitaxial CMOS by Chatterjee, Amitava, Seitchik, Jerold, Yang, Ping

“…This paper presents a simple model for the holding voltage of the parasitic thyristor in epitaxial n-well CMOS. Two-dimensional device simulations of the…”
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Patterning Accuracy and Overlay Performance in Step and Repeat X-Ray Lithography by Horiuchi, T., Deguchi, K., Saito, K., Komatsu, K., Miyake, M., Ozawa, A., Ohkubo, T.

“…X-ray lithography is now accepted as a promising tool for mass production of 0.5 μm VLSIs. High resolution capability and good process applicability have been…”
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LPCVD Tungsten Silicide with Titanium Underlayer by Joshi, R. V., Krusin-Elbaum, L., Wetzel, J. T., Herd, S. R., Brodsky, S., Karasinski, J.

“…The coming era of high density VLSI circuits demands a metallization to match the intrinsic device switching speed. The CVD deposition which produces conformal…”
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Channel Length and Source/Drain Series Resistance Extraction for Conventional and LDD MOSFET's by Chang, Chi, Hu, Genda, Hui, Ken

“…Several techniques based on electrical measurement have been developed for conventional MOSFET's for the extraction of effective channel length (L eff ) and…”
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Trench Self-Aligned EPROM Technology by Sekiya, K., Ohya, S., Nio, Y., Ozaki, J., Okamura, K., Kikuchi, M.

“…The cell size of EPROM has been inevitably larger than that of mask ROM because of the necessity of floating gate protrusions over the field oxide. In order to…”
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An Efficient SER Simulator for Dram Circuits-Including Transient and Substrate Structure Effects by Weng, K. C., Chern, J. H., Yang, P., Seitchik, J. A.

“…α-particle induced soft errors have been one of the major reliability concerns in designing high density DRAM's. In order to optimize the device and circuit…”
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Fast Direct Write E-Beam 16K Static RAM by Perner, F., Joly, R., Roylance, L. M., Peters, D., Sum, J., Liu, E. D., Clark, R., Hsu, S. H., Kruger, J., Lin, C. H., Marcoux, P. J., Peng, S., Ray, G.

“…The trend towards finer geometries and higher density circuits has made CMOS technology, with its low power dissipation and high noise margin, increasingly…”
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Analysis of Submicron MOS Device Characteristics Using a Composite Full Three-Dimensional Process/Device Simulation System by Onga, S., Shigyo, N., Yoshimi, M., Taniguchi, K.

“…Submicron CMOS circuits are promising candidates for the future high performance VLSIs. The most serious limitation for submicron MOSFETs arises from impact…”
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Simultaneous Formation of TiN and TiSi2 by Rapid Lamp Annealing in NH3 Ambient for VLSI Contacts by Okamoto, T., Tsukamoto, K., Shimizu, M., Mashiko, Y., Matsukawa, T.

“…The bilayer of self-aligned TiN/TiSi2 was formed by the lamp annealing in N2 or NH3, simultaneously. Thickness ratio TiN/TiSi was able to be controled by the…”
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